STLED524 datasheet(50/72 Pages) STMICROELECTRONICS

50 / 72 page

Detailed description

STLED524

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DocID026217 Rev 1

Figure 25. BSTOK bit behavior

4.10.8

EOSCR and step interrupts

Functions of these two interrupts are described in Section 4.7.3.

4.11

Shutdown mode

When the device is in shutdown mode, its power consumption is minimized. It is not possible

to write data to any register over SPI. RESET/PWRDN pin has to be low to keep the device

in shutdown mode. LDO is always alive regardless of the level on RESET/PWRDN pin.

SCK, MOSI, SS, SYNC and CLKIN logic input pins can increase power consumption, if they

are left floating. These pins should be connected to either logic 0 or logic 1 in shutdown

mode. Thanks to this condition, the minimum power consumption can be achieved. INT pin

is pulled up typically. If this pin is not used in the application, it can be left floating in

shutdown mode without any negative impact on power consumption. Do not pull this pin

down in shutdown mode as it increases power consumption. MISO pin is in high Z state,

when the device is in shutdown mode. So it can be left floating or it can be pulled up or down

without any effect on power consumption in shutdown mode. CLKOUT pin is driven low

internally in shutdown mode. So it can be left floating in shutdown mode. Do not pull this pin

up in shutdown mode as it increases power consumption.

4.12

Undervoltage lockout

If the input voltage falls below VUVLOF threshold, the device enters the undervoltage

lockout. Boost and drivers are turned off. LDO is not turned off. When the input voltage rises

above VUVLOR, patterns have to be loaded again and the device has to be re-enabled,

because it is not guaranteed that the digital section can keep data during the undervoltage

lockout.

GIPG2103141128LM

STLED524 Datasheet(PDF) 50 Page - STMicroelectronics