TMS320DM814X datasheet(59/377 Pages) TI1

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TMS320DM8148, TMS320DM8147

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SPRS647E – MARCH 2011 – REVISED DECEMBER 2013

3.2.6

EMAC [(R)(G)MII Modes] and MDIO

Table 3-7. EMAC[0] Terminal Functions [(R)(G)MII]

SIGNAL

TYPE(1)

OTHER(2) (3)

MUXED

DESCRIPTION

NAME

NO.

EMAC[0] (G)MII Mode

An EMAC bootmode must be selected via the BTMODE[4:0] pins. Once the EMAC bootmode is selected, the BTMODE[9:8] pins determine

the Ethernet PHY Mode Selection (for example, 00b is MII mode). For more detailed information on EMAC bootmodes and Ethernet PHY

Mode selection, see Section 4.2.6, Ethernet PHY Mode Selection.

These pin functions are available only when GMII or MII modes are selected.

EMAC[0]_MCOL/

EMAC[0],

EMAC[0]_RGRXCTL/

IPD

VIN[1]B, GP3

VIN[1]B_D[1]/

L23

[G]MII Collision Detect (Sense) input

DVDD_GPMC

PINCNTL236

EMAC[0]_RMRXD[0]/

DSIS: 0

GP3[24]

EMAC[0]_MCRS/

EMAC[0],

EMAC[0]_RGRXD[2]/

IPD

VIN[1]B, GP3

VIN[1]B_D[2]/

R25

[G]MII Carrier Sense input

DVDD_GPMC

PINCNTL237

EMAC[0]_RMRXD[1]/

DSIS: 0

GP3[25]

EMAC[0]_GMTCLK/

EMAC[1],

EMAC[1]_RGRXC/

IPD

GPMC, SPI[2]

K23

GMII Source Synchronous Transmit Clock

GPMC_A[6]/

DVDD_GPMC

PINCNTL249

SPI[2]_D[1]

DSIS: N/A

EMAC[0]_MRCLK/

EMAC[0],

EMAC[0]_RGTXC/

VIN[1]B, SPI[3],

VIN[1]B_D[4]/

IPD

H27

GP3

[G]MII Receive Clock

EMAC[0]_RMCRSDV/

DVDD_GPMC

PINCNTL239

SPI[3]_SCS[2]/

DSIS: 0

GP3[27]

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, MM = Multi Muxed, DSIS = De-

selected Input State

(2)

IPD = Internal Pulldown Active, IPU = Internal Pullup Active, DIS = Internal Pull Disabled. This represents the default state of the

Internal Pull after Reset. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown

resistors are required, see Section 4.5.1, Pullup/Pulldown Resistors and Section 7.3.17, Pin Behaviors at Reset.

(3)

Specifies the operating I/O supply voltage for each signal

Device Pins

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