Clock recovery system

(DPO7254C and DPO7354C only, requires Opt. ST1G)

Clock recovery phase locked

loop bandwidth

Fixed at FBaud/500

Clock recovery frequency

range

1.5 MBaud to 1.25 GBaud

Clock recovery jitter (RMS)

Clock recovery tracking/

acquisition range

±5% of requested baud rate (typical)

Minimum signal amplitude

needed for clock recovery

Trigger level range

Any channel

±12 divisions from center of screen

Auxiliary input

Line

Fixed at 0 V

Trigger coupling

DC

AC (attenuates <60 Hz)

HF Rej (attenuates >30 kHz)

LF Rej (attenuates <80 kHz)

Noise Reject (reduces sensitivity)

Trigger holdoff range

250 ns min to 100 s

Trigger types

A Event and Delayed B Event trigger types: edge, glitch, width, runt, timeout, transition time, logic pattern, logic state, setup/hold,

window - all except Edge, Pattern, and State can be Logic State qualified by up to two channels.

Edge

Positive, negative, or either slope on any channel or front-panel auxiliary input. Coupling includes DC, AC, noise reject, HF reject,

and LF reject.

Glitch

Trigger on or reject glitches of positive, negative, or either polarity. Minimum glitch width is 170 ps (typical) with rearm time of

250 ps (for DPO7254C or DPO7354C).

Width

Trigger on width of positive or negative pulse either within or outside selectable limits (225 ps to 10 s).

Runt

Trigger on a pulse that crosses one threshold but fails to cross a second threshold before crossing the first again. Event can be

time- or logic-qualified.

Window

Trigger on an event that enters or exits a window defined by two user-adjustable thresholds. Event can be time or logic qualified.

Timeout

Trigger on an event which remains high, low, or either, for a specified time period (300 ps to 1 s).

Transition

Trigger on pulse edge rates that are faster or slower than specified. Slope may be positive, negative, or either.

Setup/Hold

Trigger on violations of both setup time and hold time between clock and data present on any two input channels.

Logic Pattern

Trigger when pattern goes false or stays true for specified period of time (300 ps to 1 s). Pattern (AND, OR, NAND, NOR) specified

for all analog input channels defined as high, low, or don’t care.

Logic State

Any logical pattern of channels (1, 2, 3) clocked by edge on channel 4. Trigger on rising or falling clock edge.

Parallel Bus

Trigger on specified data value on defined parallel bus.

Video

Trigger on all lines, specific line number, odd, even, or all fields on NTSC, PAL, SECAM, and HDTV 480p/60, 576p/50, 875i/60,

720p/30, 720p/50, 720p/60, 1080/24sF, 1080i/50, 1080p/25, 1080i/60, 1080p/24, 1080p/25, 1080p/50, 1080p/60, Bi-level, Tri-

level.

Visual Trigger

Trigger on up to 8 user-specified areas, including rectangle, triangle, trapezoid, hexagon, and user-specified shapes on any of the

analog channels.

Datasheet

14 www.tek.com/DPO7000