LPC5410X datasheet(18/95 Pages) NXP

18 / 95 page

LPC5410x

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Product data sheet

Rev. 2.11 — 19 September 2019

18 of 95

NXP Semiconductors

LPC5410x

32-bit ARM Cortex-M4/M0+ microcontroller

[1]

PU = input mode, pull-up enabled (pull-up resistor pulls up pin to VDD). Z = high impedance; pull-up or pull-down disabled.

Reset state reflects the pin state at reset without boot code operation. For pin states in the different power modes, see Section 6.2.2 “Pin

states in different power modes”. For termination on unused pins, see Section 6.2.1 “Termination of unused pins”.

[2]

5 V tolerant pad with programmable glitch filter (5 V tolerant if VDD present; if VDD not present, do not exceed 3.6 V); provides digital I/O

functions with TTL levels and hysteresis; normal drive strength. See Figure 27. Pulse width of spikes or glitches suppressed by input

filter is from 3 ns to 16 ns (simulated value).

[3]

True open-drain pin. I2C-bus pins compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode

Plus. The pin requires an external pull-up to provide output functionality. When power is switched off, this pin is floating and does not

disturb the I2C lines. Open-drain configuration applies to all functions on this pin.

PIO1_14

57 [2] PU I/O PIO1_14 — General-purpose digital input/output pin.

R — Reserved.

U2_RXD — Receiver input for USART2.

SCT0_OUT7 — SCT0 output 7.

I/O SPI1_MISO — Master In Slave Out for SPI1.

PIO1_15

62 [2] PU I/O PIO1_15 — General-purpose digital input/output pin.

R — Reserved.

SCT0_OUT5 — SCT0 output 5.

CT32B1_CAP3 — 32-bit CT32B1 capture input 3.

I/O SPI1_SSEL0 — Slave Select 0 for SPI1.

PIO1_16

[2] PU I/O PIO1_16 — General-purpose digital input/output pin.

R — Reserved.

CT32B0_MAT0 — 32-bit CT32B0 match output 0.

CT32B0_CAP0 — 32-bit CT32B0 capture input 0.

I/O SPI1_SSEL1 — Slave Select 1 for SPI1.

PIO1_17

10 [2] PU I/O PIO1_17 — General-purpose digital input/output pin.

RESET

G1 64 [5] PU I

External reset input: A LOW on this pin resets the device, causing I/O ports and

peripherals to take on their default states, and processor execution to begin at

address 0. Wakes up the part from deep power-down mode.

RTCXIN

A7 33

RTC oscillator input.

RTCXOUT

B7 35

RTC oscillator output.

VREFP

B4 22

ADC positive reference voltage.

VREFN

ADC negative reference voltage.

VDDA

A4 23

Analog supply voltage.

VDD

C4,

24,

56,

Single 1.62 V to 3.6 V power supply powers internal digital functions and I/Os.

VSS

D4,

25,

Ground.

VSSA

A3 20

Analog ground.

Table 4.

Pin description …continued

Symbol

Description

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