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LPC5410X Datasheet(PDF) 29 Page - NXP Semiconductors |
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LPC5410X Datasheet(HTML) 29 Page - NXP Semiconductors |
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29 / 95 page ![]() LPC5410x All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.11 — 19 September 2019 29 of 95 NXP Semiconductors LPC5410x 32-bit ARM Cortex-M4/M0+ microcontroller • Counter or timer operation. • For each timer with pin connections, up to 4 32-bit capture channels that can take a snapshot of the timer value when an input signal transitions. A capture event may also optionally generate an interrupt. • The timer and prescaler may be configured to be cleared on a designated capture event. This feature permits easy pulse-width measurement by clearing the timer on the leading edge of an input pulse and capturing the timer value on the trailing edge. • Four 32-bit match registers that allow: – Continuous operation with optional interrupt generation on match. – Stop timer on match with optional interrupt generation. – Reset timer on match with optional interrupt generation. • For each timer with pin connections, up to 4 external outputs corresponding to match registers with the following capabilities: – Set LOW on match. – Set HIGH on match. – Toggle on match. – Do nothing on match. • PWM: for each timer with pin connections, up to 3 match outputs can be used as single edge controlled PWM outputs. 7.18.2 State Configurable Timer/PWM (SCTimer/PWM) The SCTimer/PWM (SCT0) allows a wide variety of timing, counting, output modulation, and input capture operations. The inputs and outputs of the SCTimer/PWM are shared with the capture and match inputs/outputs of the 32-bit general-purpose counter/timers. The SCTimer/PWM can be configured as two 16-bit counters or a unified 32-bit counter. In the two-counter case, in addition to the counter value the following operational elements are independent for each half: • State variable • Limit, halt, stop, and start conditions • Values of Match/Capture registers, plus reload or capture control values In the two-counter case, the following operational elements are global to the SCT, but the last three can use match conditions from either counter: • Clock selection • Inputs • Events • Outputs • Interrupts |
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