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MPF5024AMMA0ES Datasheet(PDF) 56 Page - NXP Semiconductors |
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MPF5024AMMA0ES Datasheet(HTML) 56 Page - NXP Semiconductors |
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56 / 93 page  NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 56 / 93 aaa-030055 OV/UV TH Gen OV Hyst OV SW1_PG SW1_PG_EN SW1 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OV_TH_SEL[3:0] VMON LOGIC CONTROL SW1FB UV_TH_SEL[3:0] MON_ENB MON_TRIM[2:0] DVS/REF Selector DVS/REF Selector Digital Filter OV_TH UV_TH OV/UV TH Gen OV Hyst OV SW3_PG SW3 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OV_TH_SEL[3:0] MON_TRIM[2:0] MON_VREF VMON LOGIC CONTROL SW3FB PGOOD UV_TH_SEL[3:0] MON_ENB Digital Filter OV_TH UV_TH VSW1[7:0] SW1VMON_EN[0] VBG2 OV/UV TH Gen OV Hyst OV SW2_PG SW2 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OV_TH_SEL[3:0] VMON LOGIC CONTROL SW2FB UV_TH_SEL[3:0] MON_ENB MON_TRIM[2:0] Digital Filter OV_TH UV_TH VSW2[7:0] SW2VMON_EN[0] VSW3[4:0] SW3VMON_EN[0] VBG2 VBG2 OV/UV TH Gen OV Hyst OV SW4_PG SW4 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OV_TH_SEL[3:0] MON_TRIM[2:0] MON_VREF VMON LOGIC CONTROL SW4OUT UV_TH_SEL[3:0] MON_ENB Digital Filter OV_TH UV_TH VSW4[3:0] SW4VMON_EN[0] VBG2 Figure 24. Voltage monitoring architecture |
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