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MPF5024AMMA0ES Datasheet(PDF) 83 Page - NXP Semiconductors |
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MPF5024AMMA0ES Datasheet(HTML) 83 Page - NXP Semiconductors |
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83 / 93 page ![]() NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 83 / 93 Symbol Parameter Min Typ Max Unit IQPUOFF QPU_Off LPM_OFF = 1 System ready to power on — 750 1000 µA ISYSON System On core current Run or standby and all regulators disabled Coin cell charger disabled AMUX disabled — 750 1000 µA IFSAFE Fail-safe mode VIN > UVDET — 40 150 µA 20 Typical applications aaa-030058 PF5024 FAIL-SAFE CONTROL ENx STATUS FLG from MCU ENx VDDOTP TBBEN WATCHDOG MONITORING 4 WD TIMER LOGIC CONTROL PGOOD ABIST PGOOD MONITOR 4 100 kΩ 100 kΩ 100 kΩ 100 kΩ 100 kΩ 1 µH 2 x 22 µF 4.7 µF SW1FB VSW1 VIN SW1 OV/UV MONITOR TEMP SENSE SW1 ABIST SW1LX SW1IN 1 µH 2 x 22 µF 4.7 µF SW2FB VSW2 VIN SW2 OV/UV MONITOR TEMP SENSE SW2 ABIST SW2LX SW2IN 1 µH 2 x 22 µF 4.7 µF SW3FB VSW3 VIN SW3 OV/UV MONITOR TEMP SENSE SW3 ABIST SW3LX SW3IN EP 1 µH 2 x 22 µF 4.7 µF SW4FB VSW4 VIN SW4 OV/UV MONITOR TEMP SENSE SW4 ABIST SW4LX SW4IN CLOCK MANAGEMENT 100 KH CLOCK 20 MHz CLOCK +/-25 % SPREAD SPECTRUM CLOCK SYNCHRONIZATION 20 MHz OSC DIAGNOSTIC MUX Syncin I2C CONTROL MIRROR REGISTERS FUSE CRC VERIFICATION OTP/ TRIM MEMORY FUNCTIONAL REGISTERS THERMAL MONITOR TEMP SENSE MAIN SYNC SDA SCL VDDIO I2C DATA I2C CLK I/O supply (SWx/LDOx) sync CLK functional block functional safety block VIN VIN Syncout BANDGAP COMPARATOR BG2 VIN OVLO UVDET BG1 V1P5A POR V1P5A V1P5D I2C CRC V1P5D POR IREF 2 IREF 1 1.0 µF V1P5D V1P5D 1.0 µF V1P5A V1P5A GND 2.2 kΩ 2.2 kΩ 1.0 µF Figure 34. Typical application diagram |
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