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R7FA2L1AB2DFM Datasheet(PDF) 78 Page - Renesas Technology Corp

Part # R7FA2L1AB2DFM
Description  Ultra low power 48 MHz Arm짰 Cortex-M23 core, up to 256-KB code flash memory
PDF  110 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R7FA2L1AB2DFM Datasheet(HTML) 78 Page - Renesas Technology Corp

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Table 2.54
Code flash characteristics (4)
Low-speed operating mode
Conditions: VCC = AVCC0 = 1.6 to 5.5 V, Ta = -40 to +85°C
Parameter
Symbol
ICLK = 1 MHz
ICLK = 2 MHz
Unit
Min
Typ
Max
Min
Typ
Max
Programming time
4-byte
tP4
—
86
732
—
57
502
µs
Erasure time
2-KB
tE2K
—
12.5
355
—
8.8
280
ms
Blank check time
4-byte
tBC4
—
—
46.5
—
—
23.3
µs
2-KB
tBC2K
—
—
3681
—
—
1841
µs
Erase suspended time
tSED
—
—
22.3
—
—
16.2
µs
Access window information program
Start-up area selection and security
setting time
tAWSSAS —
21.2
570
—
15.9
491
ms
OCD/serial programmer ID setting
time*1
tOSIS
—
84.7
2280
—
63.5
1964
ms
Flash memory mode transition wait
time 1
tDIS
2
—
—
2
—
—
µs
Flash memory mode transition wait
time 2
tMS
15
—
—
15
—
—
µs
Note:
Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note:
The lower-limit frequency of ICLK is 1 MHz during programming or erasing the flash memory. When using ICLK at below 4 MHz, the
frequency can be set to 1 MHz or 2 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note:
The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy
of the clock source.
Note 1. Total time of four commands.
2.11.2
Data Flash Memory Characteristics
Table 2.55
Data flash characteristics (1)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Reprogramming/erasure cycle*1
NDPEC
100000
1000000
—
Times
—
Data hold time
After 10000 times of NDPEC
tDDRP
20*2 *3
—
—
Year
Ta = +85°C
Ta = +105°C
After 100000 times of NDPEC
5*2 *3
—
—
Year
After 1000000 times of NDPEC
—
1*2 *3
—
Year
Ta = +25°C
Note 1. The reprogram/erase cycle is the number of erasure for each block. When the reprogram/erase cycle is n times (n = 100,000),
erasing can be performed n times for each block. For instance, when 1-byte programming is performed 1,000 times for different
addresses in 1-byte blocks, and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasure is not enabled. (overwriting is prohibited.)
Note 2. Characteristics when using the flash memory programmer and the self-programming library provided by Renesas Electronics.
Note 3. These results are target spec, may changed after reliability testing.
Table 2.56
Data flash characteristics (2) (1 of 2)
High-speed operating mode
Conditions: VCC = AVCC0 = 1.8 to 5.5 V
Parameter
Symbol
ICLK = 4 MHz
ICLK = 48 MHz
Unit
Min
Typ
Max
Min
Typ
Max
Programming time
1-byte
tDP1
—
45
404
—
34
321
µs
Erasure time
1-KB
tDE1K
—
8.8
280
—
6.1
224
ms
Blank check time
1-byte
tDBC1
—
—
15.2
—
—
8.3
µs
1-KB
tDBC1K
—
—
1832
—
—
466
µs
Suspended time during erasing
tDSED
—
—
13.2
—
—
10.5
µs
RA2L1 Datasheet
2. Electrical Characteristics
R01DS0385EJ0100 Rev.1.00
Aug 06, 2020
Page 78 of 110



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