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ACE25QC200GLTMTH Datasheet(PDF) 23 Page - ACE Technology Co., LTD. |
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ACE25QC200GLTMTH Datasheet(HTML) 23 Page - ACE Technology Co., LTD. |
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23 / 64 page ![]() ACE25QC200GL 2M BIT SPI NOR FLASH VER 1.1 23 Read Instructions Normal Read Data (03H) The Read Data instruction allows one or more data bytes to be sequentially read from the memory. The instruction is initiated by driving the /CS pin low and then shifting the instruction code “03h” followed by a 24-bit address (A23-A0) into the SI pin. The code and address bits are latched on the rising edge of the SCLK pin. After the address is received, the data byte of the addressed memory location will be shifted out on the SO pin at the falling edge of SCLK with most significant bit (MSB) first. The address is automatically incremented to the next higher address after each byte of data is shifted out allowing for a continuous stream of data. This means that the entire memory can be accessed with a single instruction as long as the clock continues. The instruction is completed by driving /CS high. The Read Data instruction sequence is shown in Figure 8. If a Read Data instruction is issued while an Erase, Program or other Write cycle is in progress (WIP=1) the instruction is ignored and will not have any effects on the current cycle. The Read Data instruction allows clock frequency up to to a maximum of fR (see AC Electrical Characteristics). The Normal Read Data (03h) instruction is only supported in Standard SPI mode. Figure 8. Read Data Instruction |
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