ACE25QC200GLTMTH datasheet(24/64 Pages) ACE

24 / 64 page

ACE25QC200GL

2M BIT SPI NOR FLASH

VER 1.1

Fast Read (0BH)

The Fast Read instruction is similar to the Read Data instruction except that it can operate at the highest

possible frequency of fC (see AC Electrical Characteristics). In standard SPI mode, this is accomplished by

adding eight “dummy” clocks after the 24-bit address as shown in Figure 9. The dummy clocks allow the

devices internal circuits additional time for setting up the initial address. During the dummy clocks the data

value on the SO pin is a “don’t care”.

Fast Read Dual Output (3Bh)

The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except

that data is output on two pins; SI and SO. This allows data to be transferred at twice the rate of standard

SPI devices. The Fast Read Dual Output instruction is ideal for quickly downloading code from Flash to

RAM upon power-up or for applications that cache code-segments to RAM for execution.

Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest

possible frequency of fC (see AC Electrical Characteristics). This is accomplished by adding eight “dummy”

clocks after the 24-bit address as shown in Figure 10. The dummy clocks allow the device's internal circuits

additional time for setting up the initial address. The input data during the dummy clocks is “don’t care”.

However, the SI pin should be high-impedance prior to the falling edge of the first data out clock.

Figure 9. Fast Read Instruction

Figure10. Fast Read Dual Output Instruction

ACE25QC200GLTMTH Datasheet(PDF) 24 Page - ACE Technology Co., LTD.