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ACE25QC200GLTMTH Datasheet(PDF) 35 Page - ACE Technology Co., LTD.

Part # ACE25QC200GLTMTH
Description  2M BIT SPI NOR FLASH
PDF  64 Pages
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Manufacturer  ACE [ACE Technology Co., LTD.]
Direct Link  http://www.ace-ele.com
Logo ACE - ACE Technology Co., LTD.

ACE25QC200GLTMTH Datasheet(HTML) 35 Page - ACE Technology Co., LTD.

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ACE25QC200GL
2M BIT SPI NOR FLASH
VER 1.1
35
Program / Erase and Security Instructions
Page Program (02h)
The Page Program instruction allows from one byte to 256 bytes (a page) of data to be programmed at
previously erased (FFh) memory locations. A Write Enable instruction must be executed before the device
will accept the Page Program Instruction (Status Register bit WEL= 1). The instruction is initiated by driving
the /CS pin low then shifting the instruction code “02h” followed by a 24-bit address (A23-A0) and at least
one data byte, into the SI pin. The /CS pin must be held low for the entire length of the instruction while data
is being sent to the device. The Page Program instruction sequence is shown in Figure25.
If more than 256 bytes are sent to the device, previously latched data are discarded and the last 256 data
bytes are guaranteed to be programmed correctly within the same page. If less than 256 data bytes are
sent to device, they are correctly programmed at the requested addresses without having any effects on
the other bytes of the same page. /CS must be driven high after the eighth bit of the last data byte has been
latched in; otherwise the Page Program instruction is not executed.
As with the write and erase instructions, the /CS pin must be driven high after the eighth bit of the last byte
has been latched. If this is not done the Page Program instruction will not be executed. After /CS is driven
high, the self-timed Page Program instruction will commence for a time duration of tPP (See AC
Characteristics). While the Page Program cycle is in progress, the Read Status Register instruction may
still be accessed for checking the status of the WIP bit. The WIP bit is a 1 during the Page Program cycle
and becomes a 0 when the cycle is finished and the device is ready to accept other instructions again. After
the Page Program cycle has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0.
The Page Program instruction will not be executed if the addressed page is protected by the Block Protect
(BP4, BP3, BP2, BP1, and BP0) bits
Figure25. Page Program Instruction



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