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ST25DV04KC Datasheet(PDF) 76 Page - STMicroelectronics |
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ST25DV04KC Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 203 page ![]() Figure 36. I2C Present Password Sequence Device select code Password [63:56] Ack R/W Ack Ack Ack Ack generated during 9th bit time slot. Ack Ack Ack Ack Ack Ack Ack Ack Ack Ack Ack Password [55:48] Password [47:40] Password [39:32] Password [31:24] Password [23:16] Password [15:8] Ack Ack Ack Ack Password [23:16] Password [15:08] Password [7:0] Password [63:56] Password [55:48] Password [47:40] Password [39:32] Password Address 00h Password Address 09h Validation code 09h Ack Ack Password [7:0] Ack Password [31:24] 6.6.2 I2C write password command description The I2C write password command is used to update the I2C password value (register I2C_PWD). It cannot be used to update any of the RF passwords. After the write cycle, the new I2C password value is automatically activated. The I2C password value can only be modified after issuing a valid I2C present password command. Following a Start condition, the bus master sends a device select code with the Read/Write bit (RW) reset to 0 and the Chip Enable bit E2 at 1 and E1 at 1. The device acknowledges this, as shown in Figure 37. I2C Write Password Sequence, and waits for the two I2C password address bytes, 09h and 00h. The device responds to each address byte with an acknowledge bit, and then waits for the four password data bytes, the validation code, 07h, and a resend of the eight password data bytes. The most significant byte of the password is sent first, followed by the least significant bytes. It is necessary to send twice the 64-bit password to prevent any data corruption during the write sequence. If the two 64-bit passwords sent are not exactly the same, the ST25DVxxKC does not modify the I2C password value. When the bus master generates a Stop condition immediately after the Ack bit (during the tenth bit time slot), the internal write cycle is triggered. A Stop condition at any other time does not trigger the internal write cycle. During the internal write cycle, the serial data (SDA) signal is disabled internally, and the device does not respond to any requests. Caution: I2C write password command data transits via the 256-byte fast transfer mode's buffer. Consequently fast transfer mode must be deactivated before issuing a write password command, otherwise command is NotACK (after address LSB), and programming is not done and device goes in standby mode. Figure 37. I2C Write Password Sequence Device select code Password [63:56] Ack R/W Ack Ack Ack Ack generated during 9th bit time slot. Ack Ack Ack Ack Ack Ack Ack Ack Ack Ack Ack Password [55:48] Password [47:40] Password [39:32] Password [23:16] Password [15:08] Password [7:0] Ack Ack Ack Ack Password [23:16] Password [15:08] Password [7:0] Password [63:56] Password [55:48] Password [47:40] Password [39:32] Password Address 00h Password Address 09h Validation code 07h Ack Password [31:24] Ack Password [31:24] ST25DV04KC ST25DV16KC ST25DV64KC I²C password management DS13519 - Rev 3 page 76/203 |
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