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NRF9160-SICA-R7 Datasheet(PDF) 43 Page - Nordic Semiconductor |
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NRF9160-SICA-R7 Datasheet(HTML) 43 Page - Nordic Semiconductor |
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43 / 400 page ![]() Application core Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID R/W Field Value ID Value Description A RW PALL Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses Unprotected 0xFFFFFFFF Unprotected Protected 0x00000000 Protected 4.6.1.6 ERASEPROTECT Address offset: 0x030 Erase protection Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID R/W Field Value ID Value Description A RW PALL Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality Unprotected 0xFFFFFFFF Unprotected Protected 0x00000000 Protected 4.6.1.7 OTP[n] (n=0..189) Address offset: 0x108 + (n × 0x4) One time programmable memory Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID B B B B B B B B B B B B B B B B A A A A A A A A A A A A A A A A Reset 0xFFFFFFFF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ID R/W Field Value ID Value Description A RW1 LOWER Lower half word Note: Can only be written to a non 0xFFFF value once. B RW1 UPPER Upper half word Note: Can only be written to a non 0xFFFF value once. 4.6.1.8 KEYSLOT.CONFIG[n].DEST (n=0..127) Address offset: 0x400 + (n × 0x8) Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE[0-3]) will be pushed by KMU. Note that this address must match that of a peripherals APB mapped write-only key registers, else the KMU can push this key value into an address range which the CPU can potentially read. Note: Writing/reading this register requires the KMU SELECTKEYSLOT register to be set to n+1. 4418_1315 v2.0 43 |
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