NRF9160-SICA-R7 datasheet(100/400 Pages) NORDIC

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Peripherals

PIN0.DETECT

PIN1.DETECT

PIN31.DETECT

DETECT

(Default mode)

DETECT

(LDETECT mode)

LATCH.0

LATCH.1

LATCH.31

Figure 18: DETECT signal behavior

6.4.3 GPIO security

The general purpose input/output (GPIO) peripheral is implemented as a split-security peripheral. If

marked as non-secure, it can be accessed by both secure and non-secure accesses but will behave

differently depending on the access type.

A non-secure peripheral access will only be able to configure and control pins defined as non-secure in the

system protection unit (SPU) GPIOPORT.PERM[] register(s).

A non-secure access to a register or a bitfield controlling a pin marked as secure in GPIO.PERM[] register(s)

will be ignored:

• write accesses will have no effect

• read accesses will always return a zero value

No exception is triggered when a non-secure access targets a register or bitfield controlling a secure pin.

For example, if the bit i is set in the SPU.GPIO.PERM[0] register (declaring Pin P0.i as secure), then

• non-secure write accesses to OUT, OUTSET, OUTCLR, DIR, DIRSET, DIRCLR and LATCH registers will not

be able to write to bit i of those registers

• non-secure write accesses to registers PIN[i].OUT and PIN_CNF[i] will be ignored

• non-secure read accesses to registers OUT, OUTSET, OUTCLR, IN, DIR, DIRSET, DIRCLR and LATCH will

always read a 0 for the bit at position i

• non-secure read accesses to registers PIN[i].OUT, PIN[i].OUT and PIN_CNF[i] will always return 0

The GPIO.DETECTMODE and GPIO.DETECTMODE_SEC registers are handled differently than the other

registers mentioned before. When accessed by a secure access, the DETECTMODE_SEC register control the

source for the DETECT_SEC signal for the pins marked as secure. When accessed by a non-secure access,

the DETECTMODE_SEC is read as zero and write accesses are ignored. The GPIO.DETECTMODE register

controls the source for the DETECT_NSEC signal for the pins defined as non-secure.

The DETECT_NSEC signal is routed to the GPIOTE peripheral, allowing generation of events and interrupts

from pins marked as non-secure. The DETECT_SEC signal is routed to the GPIOTESEC peripheral, allowing

generation of events and interrupts from pins marked as secure. Principle of direct pin access on

4418_1315 v2.0

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NRF9160-SICA-R7 Datasheet(PDF) 100 Page - Nordic Semiconductor