NRF9160-SICA-R7 datasheet(27/400 Pages) NORDIC

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Application core

Base address

Peripheral

Instance

Secure mapping DMA security

Description

N/A 0xE0080000

TAD

Trace and debug control

Table 4: Instantiation table

4.2.3 Peripheral access control capabilities

Information about the peripheral access control capabilities can be found in the instantiation table.

The instantiation table has two columns containing the information about access control capabilities for a

peripheral:

• Secure mapping: This column defines configuration capabilities for TrustZone-M secure attribute.

• DMA security: This column indicates if the peripheral has DMA capabilities, and if DMA transfer can be

assigned to a different security attribute than the peripheral itself.

For details on options in secure mapping column and DMA security column, see the following tables

respecitvely.

Abbreviation Description

Non-secure: This peripheral is always accessible as a non-secure peripheral.

Secure: This peripheral is always accessible as a secure peripheral.

User-selectable: Non-secure or secure attribute for this peripheral is defined by the

PERIPHID[0].PERM register.

SPLIT

Both non-secure and secure: The same resource is shared by both secure and non-

secure code.

Table 5: Secure mapping column options

Abbreviation Description

Not applicable: Peripheral has no DMA capability.

NSA

No separate attribute: Peripheral has DMA, and DMA transfers always have the same

security attribute as assigned to the peripheral.

Separate attribute: Peripheral has DMA, and DMA transfers can have a different security

attribute than the one assigned to the peripheral.

Table 6: DMA security column options

4.3 VMC — Volatile memory controller

The volatile memory controller (VMC) provides power control of RAM blocks.

Each of the available RAM blocks, which can contain multiple RAM sections, can be turned on or off

independently in System ON mode, using the RAM[n]registers. These registers also control if a RAM block,

or some of its sections, is retained in System OFF mode. See Memory chapter for more information about

RAM blocks and sections.

Note: Powering up a RAM block takes typically 10 cycles. Thus, it is recommended reading the

POWER register before accessing a RAM block that has been recently powered on.

4418_1315 v2.0

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