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NRF9160-SICA-R7 Datasheet(PDF) 140 Page - Nordic Semiconductor |
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NRF9160-SICA-R7 Datasheet(HTML) 140 Page - Nordic Semiconductor |
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140 / 400 page ![]() Peripherals be used, while the destination address determines where in the memory map the KMU pushes the key value upon a request from the CPU. Key slots can be configured to be pushed directly into write-only key registers in cryptographic accelerators, like e.g. CryptoCell, without exposing the key value itself to the CPU. This enables the CPU to use the key values stored inside the key slots for cryptographic operations without being exposed to the key value. Access to the KMU, and the key slots in the UICR, is only allowed from secure mode. 6.8.1 Functional view From a functional view the UICR is divided into two different regions, one-time programmable (OTP) memory and key storage. Finite-state machine (FSM) OTP Key storage 0x1000 User information configuration register (UICR) infopage Access control Functional view User defined Part specific instantiation KEYSLOT. CONFIG[0] (…) KEYSLOT. CONFIG[n] PERM DEST Permission legend: Write-once per halfword limitation, always readable Write-once per halfword limitation, always readable Write-once per halfword limitation, restricted usage and readability based on key header configuration UICR offset Key values STATE PUSH VALUE[0] VALUE[1] VALUE[2] VALUE[3] Regular UICR Key headers READ WRITE (…) KEYSLOT. KEY[n] KEYSLOT. KEY[0] Figure 35: Memory map overview OTP One-time programmable (OTP) memory is typically used for holding values that are written once, and then never to be changed again throughout the product lifetime. The OTP region of UICR is emulated by placing a write-once per halfword limitation on registers defined here. Key storage The key storage region contains multiple key slots, where each slot consists of a key header and an associated key value. The key value is limited to 128 bits. Any key size greater than 128 bits must be divided and distributed over multiple key slot instances. Key headers are allocated an address range of 0x400 in the UICR memory map, allowing a total of 128 keys to be addressable inside the key storage region. Note: The use of the key storage region in UICR should be limited to keys with a certain life span, and not per-session derived keys where the CPU is involved in the key exchange. 6.8.2 Access control Access control to the underlying UICR infopage in flash is enforced by a hardware finite-state machine (FSM). The FSM can allow or block transactions, depending both on the security of the transaction (secure or non-secure) and on the type of register being written and/or read. 4418_1315 v2.0 140 |
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