NRF9160-SICA-R7 datasheet(149/400 Pages) NORDIC

149 / 400 page

Peripherals

6.8.5.10 SELECTKEYSLOT

Address offset: 0x500

Select key slot to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

A A A A A A A A

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R/W

Field

Value ID

Value

Description

Select key slot ID to be read over AHB, or pushed over secure APB,

when TASKS_PUSH_KEYSLOT is started.

NOTE: ID=0 is not a valid key slot ID. The 0 ID should be used when the

KMU is idle or not in use.

NOTE: Index N in UICR->KEYSLOT.KEY[N] and UICR-

>KEYSLOT.CONFIG[N] corresponds to KMU key slot ID=N+1.

6.9 PDM — Pulse density modulation interface

The pulse density modulation (PDM) module enables input of pulse density modulated signals from

external audio frontends, for example, digital microphones. The PDM module generates the PDM clock

and supports single-channel or dual-channel (left and right) data input. Data is transferred directly to RAM

buffers using EasyDMA.

Listed here are the main features for PDM:

• Up to two PDM microphones configured as a left/right pair using the same data input

• 16 kHz output sample rate, 16-bit samples

• EasyDMA support for sample buffering

• HW decimation filters

• Selectable ratio of 64 or 80 between PDM_CLK and output sample rate

The PDM module illustrated below is interfacing up to two digital microphones with the PDM interface.

EasyDMA is implemented to relieve the real-time requirements associated with controlling of the PDM

slave from a low priority CPU execution context. It also includes all the necessary digital filter elements to

produce pulse code modulation (PCM) samples. The PDM module allows continuous audio streaming.

DIN

CLK

Bandpass and

PDM to PCM

Master clock

generator

decimation (left)

decimation (right)

Figure 37: PDM module

6.9.1 Master clock generator

The master clock generator's PDMCLKCTRL register allows adjusting the PDM clock's frequency.

The master clock generator does not add any jitter to the HFCLK source chosen. It is recommended (but

not mandatory) to use the Xtal as HFCLK source.

4418_1315 v2.0

149

NRF9160-SICA-R7 Datasheet(PDF) 149 Page - Nordic Semiconductor

NRF9160-SICA-R7 Datasheet(HTML) 149 Page - Nordic Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL