K32W14X datasheet(28/90 Pages) NXP

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Table 23. Low power mode peripheral power consumption adders (continued)

the clock source power

consumption.

FlexIO

FlexIO peripheral adder

measured by placing the

device in Sleep mode with

Wake Domain Sleep, while

Using FRO6M, emulating

UART waiting for RX data at

115200 baudrate. Does not

include selected clock source

power consumption.

3.3

µA

ADC

ADC peripheral adder by

placing the device in Sleep

mode with Wake Domain

place in Sleep. ADC in

low power single ended

mode using the FRO6M

and 10Ksps continuous

conversion. Does not include

selected clock source power

consumption.

4.1

µA

CMP

CMP peripheral adder

measured with CMP enabled

8-bit DAC and single input

for compare. The device is

placed in Sleep mode with

Wake Domain place in Sleep.

Does not include 6-bit DAC

power consumption

3.3

µA

VREF

VREF peripheral adder

measured by placing the

device in Sleep mode with

Wake Domain place in Sleep.

Generating a 1.2V reference

output voltage

3.9

µA

WDOG

WDOG peripheral adder

measured by placing the

device in Sleep mode with

Wake Domain place in Sleep.

The peripheral is configured

Using OSC-RTC (External

32kHz) using the longest

timeout period possible.

Includes the OSC_RTC

current consumption

2.8

µA

2.2.8 EMC radiated emissions operating behaviors

EMC measurements to IC-level IEC standards are available from NXP on request.

NXP Semiconductors

General

K32W14x Product Family, Rev. 3, 12/2022

Data Sheet: Technical Data

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