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HC705V8GRS/D Datasheet(PDF) 168 Page - NXP Semiconductors

Part # HC705V8GRS/D
Description  The Motorola MC68HC705V8 microcontroller is a custom HC05 based MCU featuring a Message Data Link Controller (MDLC) module and on-chip power regulation.
PDF  172 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705V8GRS/D Datasheet(HTML) 168 Page - NXP Semiconductors

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SECTION 17: ELECTRICAL SPECIFICATIONS
Page 157
MC68HC705V8 Specification Rev. 2.1
17.11.6
TRANSMITTER VPW SYMBOL TIMINGS
(fMDLC = 1.048576 MHz, VBATT = 12V, VCC = 5.0V, VSSA = 0V, TA = 25°C, unless otherwise noted)
17.11.7
RECEIVER VPW SYMBOL TIMINGS
(fMDLC = 1.048576 MHz, VBATT =12V, VCCA = 5.0V, VSSA2 = 0V, TA = 25°C, unless otherwise noted)
Note: The receiver symbol timing boundaries are subject to an uncertainty of
± 1 T
mdlc µs due to sampling considerations.
Characteristic
Number
Symbol
Min.
Typ.
Max.
Unit
Passive logic 0
10
Ttvp1
62.0
64.0
66.0
µs
Passive logic 1
11
Ttvp2
126.0
128.0
130.0
µs
Active logic 0
12
Ttva1
126.0
128.0
130.0
µs
Active logic 1
13
Ttva2
62.0
64.0
66.0
µs
Start of Frame (SOF)
14
Ttva3
198.0
200.0
202.0
µs
End of Data (EOD)
15
Ttvp3
198.0
200.0
202.0
µs
End of Frame
16
Ttv4
278.0
280.0
282.0
µs
Inter-Frame Separator (IFS)
17
Ttv6
298.0
300.0
302.0
µs
Characteristic
Number
Symbol
Min.
Typ.
Max.
Unit
Passive logic 0
10
Trvp1
34.0
64.0
96.0
µs
Passive logic 1
11
Trvp2
96.0
128.0
163.0
µs
Active logic 0
12
Trva1
96.0
128.0
163.0
µs
Active logic 1
13
Trva2
34.0
64.0
96.0
µs
Start of Frame (SOF)
14
Trva3
163.0
200.0
239.0
µs
End of Data (EOD)
15
Trvp3
163.0
200.0
239.0
µs
End of Frame
16
Trv4
239.0
280.0
320.0
µs
Break
18
Trv7
239.0
800.0
—
µs
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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