HC705V8GRSSLASHD datasheet(4/172 Pages) NXP

4 / 172 page

Page v

MC68HC705V8 Specification Rev. 2.1

SECTION 8

LOW-POWER MODES .................................................. 63

8.1

STOP INSTRUCTION ..............................................................63

8.1.1

STOP MODE .......................................................................63

8.1.2

WAIT INSTRUCTION ..........................................................65

SECTION 9

PARALLEL I/O............................................................... 67

9.1

PORT A AND PORT C .............................................................67

9.1.1

PORT A/C DATA REGISTERS............................................67

9.1.2

PORT A/C DATA DIRECTION REGISTER .........................68

9.1.3

PORT A/C I/O PIN INTERRUPTS.......................................68

9.2

PORT B ....................................................................................68

9.2.1

PORT B DATA REGISTER..................................................69

9.2.2

PORT B DATA DIRECTION REGISTER .............................69

9.3

PORT D AND PORT E .............................................................69

9.4

PORT F.....................................................................................70

9.4.1

PORT F DATA REGISTER ..................................................70

9.4.2

PORT F DATA DIRECTION REGISTER .............................70

SECTION 10

A/D CONVERTER.......................................................... 71

10.1

ANALOG SECTION ..................................................................71

10.1.1

RATIOMETRIC CONVERSION ..........................................71

10.1.2

VREFH AND VREFL...............................................................71

10.1.3

ACCURACY AND PRECISION ...........................................71

10.2

CONVERSION PROCESS .......................................................71

10.3

DIGITAL SECTION ...................................................................71

10.4

A/D STATUS AND CONTROL REGISTER (ADSCR) ..............72

10.5

A/D DATA REGISTERS ...........................................................73

10.6

A/D DURING WAIT MODE .......................................................74

10.7

A/D DURING STOP MODE ......................................................74

SECTION 11

16-BIT TIMER ................................................................ 75

11.1

COUNTER REGISTER - $18:$19, $1A:$1B.............................76

11.2

OUTPUT COMPARE REGISTER - $16:$17 ............................76

11.3

INPUT CAPTURE REGISTER - $14:$15 .................................77

11.4

TIMER CONTROL REGISTER (TCR) - $12.............................78

11.4.1

ICIE - Input Capture Interrupt Enable ..................................78

11.4.2

OCIE - Output Compare Interrupt Enable ...........................78

11.4.3

TOIE - Timer Overflow Interrupt Enable ..............................78

11.4.4

TON - Timer On...................................................................78

11.4.5

IEDG - Input Edge ...............................................................78

11.4.6

OLVL - Output Level............................................................79

11.5

TIMER STATUS REGISTER (TSR) - $13 ................................79

11.5.1

ICF - Input Capture Flag......................................................79

11.5.2

OCF - Output Compare Flag ...............................................79

11.5.3

TOF - Timer Overflow Flag..................................................79

11.5.4

Bits 0-4 - Not used...............................................................79

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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