HC705V8GRSSLASHD datasheet(8/172 Pages) NXP

8 / 172 page

Page ix

MC68HC705V8 Specification Rev. 2.1

LIST OF FIGURES

Figure 1-1:

MC68HC705V8 Pin Assignments (56 SDIP pin package) ....................3

Figure 1-2:

MC68HC705V8 Pin Assignments (68-pin PLCC package) ...................4

Figure 1-3:

MC68HC705V8 Pin Assignments (64-pin QFP) ....................................5

Figure 1-4:

MC68HC705V8 Bonding Diagram Circuit Side Up................................6

Figure 1-5:

MC68HC705V8 Bonding Diagram Circuit Side Down ...........................7

Figure 1-6:

MC68HC705V8 Block Diagram .............................................................8

Figure 1-7:

Oscillator Connections.........................................................................10

Figure 2-1:

MC68HC705V8 Single-Chip Mode Memory Map ................................15

Figure 2-2:

MC68HC705V8 I/O Registers Memory Map .......................................16

Figure 2-3:

MC68HC705V8 I/O Registers $0000-$000F .......................................18

Figure 2-4:

MC68HC705V8 I/O Registers $0010-$001F .......................................19

Figure 2-5:

MC68HC705V8 I/O Registers $0020-$002F .......................................20

Figure 2-6:

MC68HC705V8 I/O Registers $0030-$003F .......................................21

Figure 3-1:

Bootstrap EPROM Programmer Schematic ........................................24

Figure 3-2:

Programming Register.........................................................................24

Figure 3-3:

Option Register....................................................................................26

Figure 3-4:

Programming Register.........................................................................27

Figure 4-1:

MC68HC05 Programming Model ........................................................31

Figure 5-1:

Interrupt Processing Flowchart ............................................................37

Figure 5-2:

IRQ Function Block Diagram ...............................................................39

Figure 5-3:

IRQ Status & Control Register.............................................................41

Figure 5-4:

External Interrupts Timing D iagram ....................................................43

Figure 6-1:

Reset Block Diagram ...........................................................................45

Figure 6-2:

RESET and POR Timing Diagram ......................................................47

Figure 6-3:

COP Watchdog Timer Location ...........................................................49

Figure 7-1:

Miscellaneous Register .......................................................................52

Figure 7-2:

MC68HC705V8 Power Moding Flow Diagram ....................................54

Figure 7-3:

Regulator Startup ................................................................................55

Figure 7-4:

Using the 68HC705V8 with an External Regulator..............................57

Figure 7-5:

Power Moding Block Diagram .............................................................58

Figure 7-6:

MC68HC705V8 On-chip Power Supply Configuration ........................59

Figure 7-7:

HC705V8 Internal Power Routing .......................................................60

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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