MC908QT4MPE datasheet(123/184 Pages) FREESCALE

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Functional Description

MC68HC908QY/QT Family Data Sheet, Rev. 5

Freescale Semiconductor

123

control the output are the ones written to last. TSC0 controls and monitors the buffered output compare

function, and TIM channel 1 status and control register (TSC1) is unused. While the MS0B bit is set, the

channel 1 pin, TCH1, is available as a general-purpose I/O pin.

NOTE

In buffered output compare operation, do not write new output compare

values to the currently active channel registers. User software should track

the currently active channel to prevent writing a new value to the active

channel. Writing to the active channel registers is the same as generating

unbuffered output compares.

14.4.4 Pulse Width Modulation (PWM)

By using the toggle-on-overflow feature with an output compare channel, the TIM can generate a PWM

signal. The value in the TIM counter modulo registers determines the period of the PWM signal. The

channel pin toggles when the counter reaches the value in the TIM counter modulo registers. The time

between overflows is the period of the PWM signal

As Figure 14-3 shows, the output compare value in the TIM channel registers determines the pulse width

of the PWM signal. The time between overflow and output compare is the pulse width. Program the TIM

to clear the channel pin on output compare if the state of the PWM pulse is logic 1 (ELSxA = 0). Program

the TIM to set the pin if the state of the PWM pulse is logic 0 (ELSxA = 1).

The value in the TIM counter modulo registers and the selected prescaler output determines the

frequency of the PWM output The frequency of an 8-bit PWM signal is variable in 256 increments. Writing

$00FF (255) to the TIM counter modulo registers produces a PWM period of 256 times the internal bus

clock period if the prescaler select value is 000. See 14.9.1 TIM Status and Control Register.

The value in the TIM channel registers determines the pulse width of the PWM output. The pulse width of

an 8-bit PWM signal is variable in 256 increments. Writing $0080 (128) to the TIM channel registers

produces a duty cycle of 128/256 or 50%.

Figure 14-3. PWM Period and Pulse Width

TCHx

PERIOD

PULSE

WIDTH

OVERFLOW

OUTPUT

COMPARE

OUTPUT

COMPARE

OUTPUT

COMPARE

TCHx

POLARITY = 1

(ELSxA = 0)

POLARITY = 0

(ELSxA = 1)

MC908QT4MPE Datasheet(PDF) 123 Page - Freescale Semiconductor, Inc

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