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MC908QT4MPE Datasheet(PDF) 144 Page - Freescale Semiconductor, Inc |
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MC908QT4MPE Datasheet(HTML) 144 Page - Freescale Semiconductor, Inc |
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144 / 184 page ![]() Development Support MC68HC908QY/QT Family Data Sheet, Rev. 5 144 Freescale Semiconductor 15.3.1.4 Data Format Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format. Transmit and receive baud rates must be identical. Figure 15-13. Monitor Data Format 15.3.1.5 Break Signal A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal, it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal. Figure 15-14. Break Transaction 15.3.1.6 Baud Rate The monitor communication baud rate is controlled by the frequency of the external or internal oscillator and the state of the appropriate pins as shown in Table 15-1. Table 15-1 also lists the bus frequencies to achieve standard baud rates. The effective baud rate is the bus frequency divided by 256 when using an external oscillator. When using the internal oscillator in forced monitor mode, the effective baud rate is the bus frequency divided by 335. 15.3.1.7 Commands The monitor ROM firmware uses these commands: • READ (read memory) • WRITE (write memory) • IREAD (indexed read) • IWRITE (indexed write) • READSP (read stack pointer) • RUN (run user program) Table 15-2. Mode Difference Modes Functions Reset Vector High Reset Vector Low Break Vector High Break Vector Low SWI Vector High SWI Vector Low User $FFFE $FFFF $FFFC $FFFD $FFFC $FFFD Monitor $FEFE $FEFF $FEFC $FEFD $FEFC $FEFD BIT 5 START BIT BIT 1 NEXT STOP BIT START BIT BIT 2 BIT 3 BIT 4 BIT 7 BIT 0 BIT 6 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 MISSING STOP BIT 2-STOP BIT DELAY BEFORE ZERO ECHO |
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