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MC908QT4MPE Datasheet(PDF) 141 Page - Freescale Semiconductor, Inc |
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MC908QT4MPE Datasheet(HTML) 141 Page - Freescale Semiconductor, Inc |
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141 / 184 page ![]() Monitor Module (MON) MC68HC908QY/QT Family Data Sheet, Rev. 5 Freescale Semiconductor 141 Figure 15-12. Monitor Mode Circuit (Internal Clock, No High Voltage) Simple monitor commands can access any memory address. In monitor mode, the MCU can execute code downloaded into RAM by a host computer while most MCU pins retain normal operating mode functions. All communication between the host computer and the MCU is through the PTA0 pin. A level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used in a wired-OR configuration and requires a pullup resistor. The monitor code has been updated from previous versions of the monitor code to allow enabling the internal oscillator to generate the internal clock. This addition, which is enabled when IRQ is held low out of reset, is intended to support serial communication/programming at 9600 baud in monitor mode by using the internal oscillator, and the internal oscillator user trim value OSCTRIM (FLASH location $FFC0, if programmed) to generate the desired internal frequency (3.2 MHz). Since this feature is enabled only when IRQ is held low out of reset, it cannot be used when the reset vector is programmed (i.e., the value is not $FFFF) because entry into monitor mode in this case requires VTST on IRQ. The IRQ pin must remain low during this monitor session in order to maintain communication. Table 15-1 shows the pin conditions for entering monitor mode. As specified in the table, monitor mode may be entered after a power-on reset (POR) and will allow communication at 9600 baud provided one of the following sets of conditions is met: • If $FFFE and $FFFF do not contain $FF (programmed state): – The external clock is 9.8304 MHz –IRQ = VTST • If $FFFE and $FFFF contain $FF (erased state): – The external clock is 9.8304 MHz –IRQ = VDD (this can be implemented through the internal IRQ pullup) • If $FFFE and $FFFF contain $FF (erased state): –IRQ = VSS (internal oscillator is selected, no external clock required) RST (PTA3) IRQ (PTA2) PTA0 10 k Ω* OSC1 (PTA5) N.C. 8 7 DB9 2 3 5 16 15 2 6 10 9 VDD 1 µF MAX232 C1+ C1– V+ V– 5 4 1 µF C2+ C2– VDD 1 µF + 1 2 3 4 5 6 74HC125 74HC125 10 k Ω N.C. PTA1 N.C. PTA4 VSS 0.1 µF VDD + 3 1 1 µF + + + 1 µF VDD * Value not critical N.C. |
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