AMC131M02DFMR datasheet(77/89 Pages) TI

77 / 89 page

DVDD

Resonator and

Driver

LDO

DCDC_CAP

Rectifier

DGND

GPO

Control &

Serial

Interface

1.2-V

Reference

ADC

–

Gain &

Offset

Calibration

Phase

Shift &

Digital

Filter

ADC

Gain &

Offset

Calibration

Phase

Shift &

Digital

Filter

–

Clock

Generation

HLDO_OUT

GND

SCLK

DOUT

DIN

DRDY

SYNC/RESET

CLKIN

Low side supply

(3.0 V to 5.5 V)

MCU

DCDC_OUT

DCDC_HGND

HGND

AIN1P

Source

AIN0N

AIN1N

AIN0P

ISO GND

HLDO_IN

Ferrite

Phase A

Figure 9-5. Current and Voltage Sensing With the AMC131M02

9.2.2.1 Voltage Measurement

The nominal mains voltage ranges from 100 V to 240 V, so this voltage must be scaled down to be sensed by an

ADC. Figure 9-5 shows the analog front-end used for this voltage scaling at the ADC channel 1.

The analog front-end for voltage measurement consists of a voltage divider network (RHI and RLO), and an

RC low-pass filter (RFILT and CFILT). Additional protection components (such as spike protection varistors) are

usually placed as well, but are not shown in this circuit for simplicity.

Equation 12 shows how to calculate the range of differential voltages fed to the voltage ADC channel for a given

mains voltage and the selected voltage divider resistor values.

ADC

RMS

(12)

RHI is 300 kΩ and RLO is 750 Ω in a typical design. For a mains voltage of 240 V (as measured between the line

and neutral), the input signal to the voltage-sensing ADC has a voltage swing of ±256 mV (182 mVRMS) based

on Equation 12 and the selected resistor values. This voltage is well within the ±1.2-V input voltage range that

can be sensed by the AMC131M02 for the selected PGA gain value of 1 that is used for the voltage channels.

In addition, overvoltages as high as four times the main voltages (up to 1000 V) can also be measured based on

the selected combination of resistor values and gain setting.

The finite input impedance of the ADC channel 1 results in a gain error and offset error from the non-ideal

voltage division by RLO. The introduction of a resistor in series with the inverting input of the ADC can reduce

the offset and gain errors, as explained in the Isolated Voltage-Measurement Circuit With ±250-mV Input and

Differential Output application note. The value of the additional series resistor is recommended to be in the order

of RLO, and the design steps are documented in the Isolated Voltage-Measurement Circuit With ±250-mV Input

and Differential Output application note.

9.2.2.2 Current Shunt Measurement

The analog front-end for current measurement is different from the analog front-end for voltage measurement.

Figure 9-5 shows the analog front-end used for current measurement at the ADC channel 0, which consists of

the shunt resistor RSHUNT and an RC low-pass antialiasing filter (RFILT and CFILT).

For a shunt value of 200 μΩ and a maximum current of IMAX = 100 A, the maximum voltage drop across the

shunt is VSHUNT = RSHUNT × IMAX = 200 μΩ × ±100 A = ±20 mV.

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AMC131M02

SBASA56 – SEPTEMBER 2023

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