SL2S3003FUD datasheet(15/82 Pages) NXP

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NXP Semiconductors

SL2S3003/SL2S3003TT

ICODE 3 (TagTamper)

8.2.3 Configuration memory

The configuration memory stores the IC configuration settings. Direct access to this memory area is only

possible with READ_CONFIG and WRITE_CONFIG commands depending on the initialization status.

The configuration lock bit locks only the access with the WRITE CONFIG command. Commands (WRITE AFI,

LOCK AFI, WRITE PASSWORD, and others) that modify specific data fields in the configuration memory can

still be used, if the related data fields are not locked.

• Blocks 26 - 31 (OTP bits)

OTP bits can be set to 1 with the WRITE CONFIG command, writing of 0 is ignored. Each OTP bit is set to

1 one time. Each block with OTP bits must not be written more than four times with the WRITE CONFIG

command.

• Block 38 (status bits)

The bits in block 38 can only be read with the READ CONFIG command. Programming with the WRITE

CONFIG command returns a response with the ERROR_flag set to 1.

• Block 41 - 46 (passwords)

If the password is not locked, the WRITE CONFIG or WRITE PASSWORD commands are used to program

the password. See Section 8.5.3.3 "WRITE PASSWORD". The READ CONFIG command masks all the

passwords bytes with 00h.

Note: Use diversified passwords. Use passwords diversified per application for the privacy passwords. Use the

configuration password only in trusted environments.

• Block 47 contains the open TagTamper message TT_OPEN_MSG for the SL2S3003TT. This block is RFU for

the SL2S3003.

• RFU

RFU marked fields are reserved for future use.

Block Address

Byte number

Dec

Access

0 - 7

OS 0 - 31

r/w

8 - 11

OS 32 - 47

r/w

12 - 15

RFU

DSFID

RFU

AFI

RFU

r/w

EAS ID0

EAS ID1

RFU

r/w

CID0

CID1

RFU

r/w

PPC_PNTR

PPC_CTRL

RFU

r/w

LP_PNTR

LP_CTRL

RFU

r/w

NFC_MIRROR_CRT

NFC_MIRROR_BLK

RFU

r/w

TT_SHOW_STATUS[1]

RFU

r/w

24 - 25

RFU

OTP_LOCK0

RFU

r/w

OPT_LOCK1

RFU

r/w

OPT_LOCK2

RFU

r/w

OPT_LOCK3

RFU

r/w

OPT_LOCK4

RFU

r/w

OPT_LOCK5

RFU

r/w

Table 9. Configuration memory blocks

SL2S3003/SL2S3003TT

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.0 — 28 March 2024

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