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SL2S3003FUD Datasheet(PDF) 73 Page - NXP Semiconductors |
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SL2S3003FUD Datasheet(HTML) 73 Page - NXP Semiconductors |
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73 / 82 page ![]() NXP Semiconductors SL2S3003/SL2S3003TT ICODE 3 (TagTamper) 11 Bare die outline not to scale! (1) (7) (2) (8) (6) (4) (3) Y X GND LA LB DP (5) (1) X-scribe line width: 35 μm (2) Y-scribe line width: 35 μm (3) Chip step, X-length: 675 μm (4) Chip step, Y-length: 635 μm (5) Bump to bump distance X (LA - LB): 530 μm (6) Bump to bump distance Y (LB - GND): 452.2 μm (7) Distance GND bump to nitride edge X: 55 μm (8) Distance GND bump to nitride edge Y: 55 μm Bump size LA and LB (X × Y): 80 μm × 80 μm Bump size DP and GND (X × Y): 80 μm × 80 μm Figure 5. Wafer SL2S3003/SL2S3003TT bare die layout SL2S3003/SL2S3003TT All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 3.0 — 28 March 2024 73 / 82 |
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