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M24M02E-F Datasheet(PDF) 22 Page - STMicroelectronics

Part # M24M02E-F
Description  2-Mbit serial I²C bus EEPROM with configurable device address, software write protection registers, and preprogrammed device address
PDF  54 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24M02E-F Datasheet(HTML) 22 Page - STMicroelectronics

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6.2.6
Minimizing write delays by polling on ACK
During the internal write cycle, the device disconnects itself from the bus, and writes a copy of the data from its
internal latches to the memory cells. The maximum write time (tw) is shown in Table 19. AC characteristics in
Fast-mode and Table 20. AC characteristics in Fast-mode Plus, but the typical time is shorter. The bus controller
can implement a polling sequence to utilize this feature.
The sequence, as shown in Figure 16, is:
•
Initial condition: A write cycle is in progress.
•
Step 1: The bus controller issues a Start condition followed by a device select code (the first byte of the
new instruction).
•
Step 2: If the device is busy with the internal write cycle, NO ACK is returned and the bus controller goes
back to step 1. If the device has terminated the internal write cycle, it responds with an ACK, indicating that
the device is ready to receive the second part of the instruction (the first byte of this instruction having been
sent during step 1).
Note:
When writing a command to the configurable device address register when C2 is reconfigured, the device
returns ACK only if:
•
Chip enable address of the device select code is equal to the new C2 value.
•
An internal write cycle is completed (a new C2 has been programmed in the chip enable register).
Figure 16. Write cycle polling flowchart using ACK
Write cycle
in progress
Next
operation is
addressing the
memory
Start condition
ACK
returned
YES
NO
YES
NO
Re-start
Stop
Data for the
write operation
Send address
and receive ACK
YES
NO
Continue the
write operation
Continue the
random read operation
Device select
with RW = 1
First byte of instruction
with RW = 0 already
decoded by the device
Device select
with RW = 0
StartCondition
1. The seven most significant bits of the device select code in a random read (bottom right box in the figure) must match those
of the device select code in the write operation (polling instruction in the figure).
M24M02E-F
Instructions
DS14157 - Rev 2
page 22/54



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