M65KG512AB8W9 datasheet(29/54 Pages) STMICROELECTRONICS

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M65KG526AB

DC and ac parameters

29/54

Table 14.

Self Refresh current (IDD6) in normal operating mode

Temperature

in °C

Memory array(1)

Unit

All banks

2 banks

1 banks

TypMax

≤ T

J ≤ 105

2.2

1.2

0.8

µA

≤ T

J ≤ 85

800

650

490

≤ T

J ≤ 70

550

380

290

–30

≤ T

J ≤ 40

300

240

210

1. VDD and VDDQ = 1.7 to 1.9 V, VSS = VSSQ = 0V; KE ≤ 0.2 V.

Table 15.

AC characteristics(1) - TJ = −30 to 85 °C

Symbol

Alt

Parameter

M65KG512AB

Unit

Min

Max

tAC

(2)

Data Output access time from K and K

2.0

6.0

tAS

(3)

tIS

Address and Control Input setup time

1.3

tAH

(3)

tIH

Address Control Input hold time

1.3

tCK

Clock Cycle Time

7.5

tDAL

Autoprecharge write recovery and precharge time

tWR+tRP

tDQSCK

(2)

UDQS/LDQS access time from K and K

2.0

6.0

tDIPW

Data Output and LDQM/UDQM inputs pulse width

1.75

tDQSHZ

(4)

UDQS/LDQS High-Z Time from K and K

1.5

6.0

tDQSLZ

(6)

UDQS/LDQS Low-Z time from K and K

1.5

6.0

tDQSQ

(3)

UDQS/LDQS to Data Output skew

0.65

tDS

(3)

Data Input and UDQM/LDQM setup time

0.8

tDH

(3)

Data Input and UDQM/LDQM hold time

0.8

tIPW

Addresses and control pulse width

tOHZ

(4)

tHZ

Data Output High-Z time from K and K

1.0

6.0

tOLZ

(5)

tLZ

Data Output Low-Z time from K and K

1.0

6.0

tQH

Data and LDQS/UDQS Output hold time from DQS

tHP-tQHS

tQHS

Data hold skew factor

0.75

tRAS

RAS Active Time (Bank (Row) Activate to Bank Precharge)

120000

tRC

RAS Cycle Time (Bank (Row) Activate to Bank Activate in Auto

Refresh mode)

tRFC

RAS Cycle Time (Auto Refresh to Bank Active in Auto Refresh

mode)

108

tRCD

Delay Time, from RAS Active to CAS active

tRRD

Delay Time, from RAS Active to RAS Bank active

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