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PPC440EPX-SPAFFFTS Datasheet(PDF) 67 Page - Applied Micro Circuits Corporation |
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PPC440EPX-SPAFFFTS Datasheet(HTML) 67 Page - Applied Micro Circuits Corporation |
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67 / 94 page ![]() 440EPx – PPC440EPx Embedded Processor Revision 1.26 – October 15, 2007 AMCC Proprietary 67 Preliminary Data Sheet Input Logic High 3.3V PCI VIH 0.5OVDD OVDD+0.5 V 1 Input Logic High 3.3V LVTTL +2.0 +3.6 V Input Logic High 2.5V CMOS, 3.3V tolerant +1.7 +3.6 V Input Logic High 1.8V DDR2 (2.5V DDR1) SVREF + 0.125 (0.15) 2.2 (3.0) V Input Logic Low 3.3V PCI VIL −0.5 0.35OVDD V 1 Input Logic Low 3.3V LVTTL 0 +0.8 V Input Logic Low 2.5V CMOS 0 +0.7 V Input Logic Low 1.8V DDR2 (2.5V DDR1) -0.3 (-0.3) SVREF − 0.125 (0.15) V Output Logic High 3.3V PCI VOH 0.9OVDD - V 1 Output Logic High 3.3V LVTTL +2.4 +3.6 V Output Logic High 2.5V CMOS +2.0 +2.7 V Output Logic High 1.8V DDR2 (2.5V DDR1) +0.95 (+1.7) +1.95 (+2.7) V 5 Output Logic Low 3.3V PCI VOL - 0.1OVDD V 1 Output Logic Low 3.3V LVTTL 0 +0.4 V Output Logic Low 2.5V CMOS 0 +0.4 V Output Logic Low 1.8V DDR2 (2.5V DDR1) 0 +0.43 (+0.54) V 5 Input Leakage Current (no pull-up or pull-down) IIL1 0 0 μA Input Leakage Current for pull-down IIL2 0 (LPDL) 200 (MPUL) μA Input Leakage Current for pull-up IIL3 −150 (LPDL) 0 (MPUL) μA Input Max Allowable Overshoot 3.3V LVTTL VIMAO +3.9 V Input Max Allowable Undershoot 3.3V LVTTL VIMAU −0.6 V Output Max Allowable Overshoot 3.3V LVTTL VOMAO +3.9 V Output Max Allowable Undershoot 3.3V LVTTL VOMAU3 −0.6 V Case Temperature TC −40 +100 °C 6 Notes: 1. PCI drivers meet PCI specifications. 2. SVREF = SOVDD/2. SOVDD = +1.8V for DDR2 memory or +2.5V for DDR1 memory. 3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the PPC440EPx. See “Absolute Maximum Ratings” on page 66. 4. Startup sequencing of the power supply voltages is not required. A power-down cycle must complete (OVDD and VDD are below +0.4V) before a new power-up cycle is started 5. At IOH = IOL= 10ma. 6. Case temperature, TC, is measured at top center of case surface with device soldered to a circuit board. Table 10. Recommended DC Operating Conditions (Sheet 2 of 2) Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended conditions can affect device reliability. Parameter Symbol Minimum Typical Maximum Unit Notes |
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