L99LDLH32 datasheet(115/142 Pages) STMICROELECTRONICS

115 / 142 page

DS12879 Rev 6

115/142

L99LDLH32

FTP and RAM memory mapping

141

87-86

WD_CONF

Watchdog timeout period t_WD

00: 50 ms

01: 100 ms

10: 200 ms

11: 25 ms

VREF_PRE_REG

VREF_PRE_REG enable

0 (default): VREF_PRE_REG feedback reference

voltage generation is enabled

1: VREF_PRE_REG feedback reference voltage

generation is disabled

84-83

Reserved

82-80

VNTC_TH

NTC voltage threshold related to the start of

derating

000: 2,034 V (55 °C)

001: 1,908 V (60 °C)

010: 1,783 V (65 °C)

011: 1,660 V (70 °C)

100: 1,423 V (80 °C)

101: 1,207 V (90 °C)

110: 1,106 V (95 °C)

111: 1,013 V (100 °C)

79-72

Reserved

71-69

PWM_FREQ_DIN

PWM frequency:

000: 200 Hz

001: 300 Hz

010: 400 Hz

011: 500 Hz

100: 700 Hz

101: 1000 Hz

110: 1200 Hz

111: 1400 Hz

OL_EN

Enable Open load fault propagation of Group 1 on

Fault pin

0: open load propagation to Fault pin disabled

1: open load propagation to Fault pin enabled

67-66

Reserved

FAULT_REACT_MODE_01

Fault reaction mode Group 01:

0: Fault on one string, all strings of the same group

are turned off

1: Fault on one string, no action on other strings of

same Group

Table 69. Row_12 (continued)

Bit

Name

Default

Description

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