TAS5802PWPR datasheet(89/106 Pages) TI2

89 / 106 page

8.4.1.3.2.1 PCB footprint and Via Arrangement

The PCB footprint (also known as a symbol or land pattern) communicates to the PCB fabrication vendor the

shape and position of the copper patterns to which the TAS5802 device will be soldered. This footprint can be

followed directly from the guidance in the package addendum at the end of this data sheet. It is important to

make sure that the thermal pad, which connects electrically and thermally to the PowerPAD™ of the TAS5802

device, be made no smaller than what is specified in the package addendum. This ensures that the TAS5802

device has the largest interface possible to move heat from the device to the board.

The via pattern shown in the package addendum provides an improved interface to carry the heat from the

device through to the layers of the PCB, because small diameter plated vias (with minimally-sized annular rings)

present a low thermal-impedance path from the device into the PCB. Once into the PCB, the heat travels away

from the device and into the surrounding structures and air. By increasing the number of vias, as shown in

Section 8.4.2, this interface can benefit from improved thermal performance.

Note

Vias can obstruct heat flow if they are not constructed properly.

More notes on the construction and placement of vias are as follows:

• Remove thermal reliefs on thermal vias, because they impede the flow of heat through the via.

• Vias filled with thermally conductive material are best, but a simple plated via can be used to avoid the

additional cost of filled vias.

• The diameter of the drull must be 8 mm or less. Also, the distance between the via barrel and the surrounding

planes should be minimized to help heat flow from the via into the surrounding copper material. In all cases,

minimum spacing should be determined by the voltages present on the planes surrounding the via and

minimized wherever possible.

• Vias should be arranged in columns, which extend in a line radially from the heat source to the surrounding

area. This arrangement is shown in Section 8.4.2.

• Ensure that vias do not cut off power current flow from the power supply through the planes on internal

layers. If needed, remove some vias that are farthest from the TAS5802 device to open up the current path to

and from the device.

8.4.1.3.2.2 Solder Stencil

During the PCB assembly process, a piece of metal called a stencil on top of the PCB and deposits solder

paste on the PCB wherever there is an opening (called an aperture) in the stencil. The stencil determines the

quantity and the location of solder paste that is applied to the PCB in the electronic manufacturing process. In

most cases, the aperture for each of the component pads is almost the same size as the pad itself. However,

the thermal pad on the PCB is large and depositing a large, single deposition of solder paste would lead to

manufacturing issues. Instead, the solder is applied to the board in multiple apertures, to allow the solder paste

to outgas during the assembly process and reduce the risk of solder bridging under the device. This structure is

called an aperture array, and is shown in Section 8.4.2. It is important that the total area of the aperture array

(the area of all of the small apertures combined) covers between 70% and 80% of the area of the thermal pad

itself.

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TAS5802

SLASFB7A – NOVEMBER 2024 – REVISED AUGUST 2025

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TAS5802PWPR Datasheet(PDF) 89 Page - Texas Instruments

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