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MAXQ3180-RAN+ Datasheet(PDF) 38 Page - Maxim Integrated Products |
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MAXQ3180-RAN+ Datasheet(HTML) 38 Page - Maxim Integrated Products |
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38 / 48 page ![]() programmed to enable and configure this feature. If the measured E_VA value for a phase (A, B, or C) falls below the NOLOAD threshold, the energy accumula- tors for this phase are not incremented. Setting NOLOAD = 0 disables this feature. Energy Pulse Output The two pulse output pins, CFP and CFQ, have associ- ated accumulators PLS1, PLS2 and configurable thresholds THR1, THR2. The MAXQ3180 issues a pulse on the output pin when the pulse accumulator exceeds the threshold level (e.g., PLS1 > THR1), then continues accumulation from the level PLS1 = PLS1 - THR1. Each pulse output accumulator can be configured to include energy accumulators E1, E2, or E3 (typically corresponding to phase A, B, C) as independent terms, and to output various quantities, by setting the PLSCFG register: PLSCFG = (qqqqqmmm ppppppnnn) binary Bits [2:0] (nnn) and [10:8] (mmm) specify which phase(s) are included in the pulse output. Bits [7:3] (ppppp) specify the quantity that is directed into the pulse 1 output; bits [15:11] (qqqqq) specify the quantity that is directed into the pulse 2 output. Both PLS1 and PLS2 accumulators accumulate only absolute values of selected quantity. If the selected pulse-output quantity changes sign, the PLS1 or PLS2 accumulator is cleared and starts accumulation over. The REV_P (reverse power) bit is set in the STATUS2 register if the PLS1 input stays negative for REV_TIMO consecutive line cycles; the bit is cleared when the PLS1 input stays positive for REV_TIMO consecutive line cycles. Additionally, the direction change DCH_P status bit is set whenever the direction bit REV_P changes its state. The DCH_P bit causes an interrupt request to the master if enabled (unmasked). Similarly, the REV_Q bit is set in the STATUS2 register if the PLS2 input stays negative for REV_TIMO consecutive line cycles; the bit is cleared when the PLS2 input stays posi- tive for REV_TIMO consecutive line cycles. Additionally, the DCH_Q status bit is set whenever the direction bit REV_Q changes its state. The DCH_Q bit causes an inter- rupt request to the master if enabled (unmasked). Low-Power, Multifunction, Polyphase AFE 38 ______________________________________________________________________________________ Table 9. Pulse Output Configuration nnn BITS PLS1 INCLUDE mmm BITS PLS2 INCLUDE 000 0 000 0 001 E1 001 E1 010 E2 010 E2 011 E1 + E2 011 E1 + E2 100 E3 100 E3 101 E1 + E3 101 E1 + E3 110 E2 + E3 110 E2 + E3 111 E1 + E2 + E3 111 E1 + E2 + E3 Table 10. Pulse Output Quantity Selection ppppp OR qqqqq ACCUMULATED VALUE DESCRIPTION 00000 AP - AN True active energy (may be negative) 00001 AP + AN Absolute active energy 00010 R1 + R2 - R3 - R4 True reactive energy (may be negative) 00011 R1 + R2 + R3 + R4 Absolute reactive energy 00100 VA Apparent energy 00101 IH Amp-hours 00110 IRMS IRMS (for calibration purposes) 00111 VRMS VRMS (for calibration purposes) 01000 AP Active positive energy 01001 AN Active negative energy |
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