MAXQ3180-RAN+ datasheet(6/48 Pages) MAXIM

6 / 48 page

Low-Power, Multifunction, Polyphase AFE

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Pin Description

NAME

FUNCTION

INP

I0P

I0N

I1P

I1N

I2P

I2N

Analog Inputs for the Phase A, Phase B, Phase C, and Neutral Current Channels

AGND

Analog Ground

XTAL2

XTAL1

High-Frequency Crystal Input/Output. When using an external high-frequency crystal, the crystal

oscillator circuit should be connected between XTAL1 and XTAL2. When using an externally driven

clock (EXTCLK = 1), the clock should be input at XTAL1, with XTAL2 left unconnected.

IRQ

Interrupt Request Output. This line is driven low by the device to indicate to the master that an

unmasked interrupt has occurred.

SSEL

Slave Select Input. This line is the active-low slave select input for the SPI interface.

SCLK

Slave Clock Input. This line is the clock input for the SPI interface, which always operates in slave

mode.

MOSI

Master Out-Slave In Input. This line is used by the master to transmit data to the slave (the

MAXQ3180) over the SPI interface.

MISO

Master In-Slave Out Output. This line is used by the MAXQ3180 (the slave) to transmit data back to

the master over the SPI interface.

17, 22

DVDD

Digital Supply Voltage

DGND

Digital Ground

CFP

Active Energy Pulse Output

CFQ

Reactive Energy Pulse Output

RESET

Active-Low Reset Input/Output. An external master can reset the MAXQ3180 by driving this pin low.

This pin includes a weak pullup resistor to allow for a combination of wired-OR external reset

sources. An RC circuit is not required for power-up, as this function is provided internally. This pin

also acts as a reset output when the source of the reset is internal to the device (power-fail, watchdog

reset, etc.). In this case, the RESET pin is held low by the device until it exits the reset state, then the

RESET pin is released.

VCOMM

Voltage Bias. This pin can be used to create an input common-mode DC offset for ADC channel

conversions.

VREF

Voltage Reference. Reference voltage for the ADC. An external reference voltage can be connected to

this pin when extremely high accuracy is required.

AVDD

Analog Supply Voltage

V0P

V1P

V2P

Analog Inputs for the Phase A, Phase B, and Phase C Voltage Channels

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