PLQP0048KB-B datasheet(33/146 Pages) RENESAS

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RL78/H1D

2. ELECTRICAL SPECIFICATIONS (R5F11N, R5F11P) (A: TA = -40 to +85°C)

R01DS0318EJ0111 Rev. 1.11

Page 33 of 143

Mar 22, 2024

Note 1.

Total current flowing into VDD, including the input leakage current flowing when the level of the input pin is fixed to VDD or

VSS. The following points apply in the HS (high-speed main) mode.

•The currents in the “TYP.” column do not include the operating currents of the peripheral modules.

•The currents in the “MAX.” column include the operating currents of the peripheral modules, except for those flowing into

the LCD controller/driver, A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors, and those flowing

while the data flash memory is being rewritten.

In the subsystem clock operation, the currents in both the “TYP.” and “MAX.” columns do not include the operating

currents of the peripheral modules. However, in HALT mode, including the current flowing into the real-time clock 2. In the

STOP mode, the currents in both the “TYP.” and “MAX.” columns do not include the operating currents of the peripheral

modules. The current flowing into AFE is not included.

Note 2.

During HALT instruction execution by flash memory.

Note 3.

When high-speed on-chip oscillator and subsystem clock are stopped.

Note 4.

When high-speed system clock and subsystem clock are stopped.

Note 5.

When high-speed on-chip oscillator and high-speed system clock are stopped. When RTCLPC = 1 and setting ultra-low

current consumption (AMPHS1 = 1).

Note 6.

Relationship between operation voltage width, operation frequency of CPU and operation mode is as below.

HS (high-speed main) mode:

2.7 V

≤ VDD ≤ 5.5 V@1 MHz to 24 MHz

2.4 V

≤ VDD ≤ 5.5 V@1 MHz to 16 MHz

Note 7.

Regarding the value for current to operate the subsystem clock in STOP mode, refer to that in HALT mode.

Note 8.

IDD2 and IDD3 do not include the current flowing to the AFE.

The current value of the RL78 microcontrollers is the sum of IDD1, IDD2, or IDD3 and AFE current (AVDD systems) when

the AFE operates in the operating mode, HALT mode, or STOP mode.

Remark 1. fMX:

High-speed system clock frequency (X1 clock oscillation frequency or external main system clock frequency)

Remark 2. fIH:

High-speed on-chip oscillator clock frequency

Remark 3. fSUB:

Subsystem clock frequency (XT1 clock oscillation frequency)

Remark 4. Except subsystem clock operation, temperature condition of the TYP. value is TA = 25°C.

PLQP0048KB-B Datasheet(PDF) 33 Page - Renesas Technology Corp

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