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NRF52820-QDAA-R Datasheet(PDF) 249 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 249 Page - Nordic Semiconductor |
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249 / 437 page ![]() Peripherals 6.15.2.9 TXD Address offset: 0x51C TXD register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A A A A A A A A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW TXD TX data to send. Double buffered. 6.15.2.10 FREQUENCY Address offset: 0x524 SPI frequency. Accuracy depends on the HFCLK source selected. Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Reset 0x04000000 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW FREQUENCY SPI master data rate K125 0x02000000 125 kbps K250 0x04000000 250 kbps K500 0x08000000 500 kbps M1 0x10000000 1 Mbps M2 0x20000000 2 Mbps M4 0x40000000 4 Mbps M8 0x80000000 8 Mbps 6.15.2.11 CONFIG Address offset: 0x554 Configuration register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID C B A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW ORDER Bit order MsbFirst 0 Most significant bit shifted out first LsbFirst 1 Least significant bit shifted out first B RW CPHA Serial clock (SCK) phase Leading 0 Sample on leading edge of clock, shift serial data on trailing edge Trailing 1 Sample on trailing edge of clock, shift serial data on leading edge C RW CPOL Serial clock (SCK) polarity ActiveHigh 0 Active high ActiveLow 1 Active low 4463_156 v1.0 249 |
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