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NRF52820-QDAA-R Datasheet(PDF) 250 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 250 Page - Nordic Semiconductor |
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250 / 437 page ![]() Peripherals 6.15.3 Electrical specification 6.15.3.1 SPI master interface electrical specifications Symbol Description Min. Typ. Max. Units fSPI Bit rates for SPI19 820 Mbps tSPI,START Time from writing TXD register to transmission started 1 µs 6.15.3.2 Serial Peripheral Interface (SPI) Master timing specifications Symbol Description Min. Typ. Max. Units tSPI,CSCK SCK period 125 ns tSPI,RSCK,LD SCK rise time, standard drive 21 tRF,25pF tSPI,RSCK,HD SCK rise time, high drive21 tHRF,25pF tSPI,FSCK,LD SCK fall time, standard drive21 tRF,25pF tSPI,FSCK,HD SCK fall time, high drive21 tHRF,25pF tSPI,WHSCK SCK high time21 (tCSCK/2) – tRSCK tSPI,WLSCK SCK low time21 (tCSCK/2) – tFSCK tSPI,SUMI MISO to CLK edge setup time 19 ns tSPI,HMI CLK edge to MISO hold time 18 ns tSPI,VMO CLK edge to MOSI valid 59 ns tSPI,HMO MOSI hold time after CLK edge 20 ns tHMO MSb LSb MSb LSb MOSI (out) MISO (in) CPOL=0 CPHA=0 tSUMI tHMI tRSCK tFSCK tCSCK tWHSCK tWLSCK tVMO CPOL=1 CPHA=0 CPOL=0 CPHA=1 CPOL=1 CPHA=1 Figure 98: SPI master timing diagram 19 High bit rates may require GPIOs to be set as High Drive, see GPIO chapter for more details. 20 The actual maximum data rate depends on the slave's CLK to MISO and MOSI setup and hold timings. 21 At 25 pF load, including GPIO capacitance, see GPIO electrical specification. 4463_156 v1.0 250 |
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