NRF52820-QDAA-R datasheet(307/437 Pages) NORDIC

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Peripherals

SDA

RXD-1

TXD+1

EasyDMA

RXD.PTR

TXD.PTR

buffer[0]

buffer[1]

buffer[RXD.MAXCNT-1]

RAM

buffer[0]

buffer[1]

buffer[TXD.MAXCNT-1]

PSEL.SDA

GPIO

PSEL.SCL

TWIM

TXD buffer

RXD buffer

SCL

Figure 113: TWI master with EasyDMA

A typical TWI setup consists of one master and one or more slaves. For an example, see the following

figure. This TWIM is only able to operate as a single master on the TWI bus. Multi-master bus

configuration is not supported.

TWI master

(TWIM)

TWI slave

(Sensor)

Address = b1011000

TWI slave

Address = b1011011

SCL

TWI slave

(EEPROM)

Address = b1011001

SCL

VDD

SDA

SCL

SDA

Figure 114: A typical TWI setup comprising one master and three slaves

This TWI master supports clock stretching performed by the slaves. The SCK pulse following a stretched

clock cycle may be shorter than specified by the I2C specification.

The TWI master is started by triggering the STARTTX or STARTRX tasks, and stopped by triggering the STOP

task. The TWI master will generate a STOPPED event when it has stopped following a STOP task.

After the TWI master is started, the STARTTX or STARTRX tasks should not be triggered again until the TWI

master has issued a LASTRX, LASTTX, or STOPPED event.

The TWI master can be suspended using the SUSPEND task, this can be used when using the TWI master

in a low priority interrupt context. When the TWIM enters suspend state, will automatically issue a

SUSPENDED event while performing a continuous clock stretching until it is instructed to resume operation

via a RESUME task. The TWI master cannot be stopped while it is suspended, thus the STOP task has to be

issued after the TWI master has been resumed.

Note: Any ongoing byte transfer will be allowed to complete before the suspend is enforced. A

SUSPEND task has no effect unless the TWI master is actively involved in a transfer.

If a NACK is clocked in from the slave, the TWI master will generate an ERROR event.

4463_156 v1.0

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