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DS72011RB120FPV Datasheet(PDF) 243 Page - Renesas Technology Corp

Part # DS72011RB120FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
PDF  1196 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DS72011RB120FPV Datasheet(HTML) 243 Page - Renesas Technology Corp

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Section 9 Bus State Controller (BSC)
Rev. 2.00 Sep. 07, 2007 Page 215 of 1164
REJ09B0321-0200
Bit
Bit Name
Initial
Value
R/W
Description
29, 28
PBCNT[1:0] 00
R/W
Page Access Bit Boundary Select
These bits select the bit boundary for page access
operation. When the bit boundary specified by PBCNT
is exceeded during page access, page access
operation is halted temporarily (the
CSn signal is
negated), and then page access operation begins
again. The value written to these bits is valid only when
either of the PWENB bit or the PRENB bit is set to 1.
00: 64-bit boundary
01: 128-bit boundary
10: 256-bit boundary
11: Setting prohibited
27, 26
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
25
PWENB
0
R/W
Page Write Access Enable
This bit is used to enable page write access.
0: Page write access disabled
1: Page write access enabled
24
PRENB
0
R/W
Page Read Access Enable
This bit is used to enable page read access.
0: Page write access disabled
1: Page write access enabled
23 to 20
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.



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