Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

DS72011RB120FPV Datasheet(PDF) 317 Page - Renesas Technology Corp

Part # DS72011RB120FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
PDF  1196 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DS72011RB120FPV Datasheet(HTML) 317 Page - Renesas Technology Corp

Back Button DS72011RB120FPV Datasheet HTML 313Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 314Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 315Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 316Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 317Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 318Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 319Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 320Page - Renesas Technology Corp DS72011RB120FPV Datasheet HTML 321Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 317 / 1196 page
background image
Section 10 Bus Monitor
Rev. 2.00 Sep. 07, 2007 Page 289 of 1164
REJ09B0321-0200
10.1.2
Bus Monitor Status Register 1 (SYCBESTS1)
SYCBESTS1 indicates the status of slave bus (peripheral bus (1)) regarding whether a timeout
occurred, whether an illegal address access was made, or which bus master accessed the slave bus.
Table 10.2 shows the correspondence between the bus space and the slave bus.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9876543210
Bit:
Initial value:
R/W:
0000000000000000
RRRRRRRRRRRRRRRR
RRRRRRRRRRRRRRR
0000000000000000
R
————————————————
—
PTO
PER
—
—
—
PMST[1:0]
—
—
—
—
—
—
——
Bit
Bit Name
Initial
Value
R/W
Description
31 to 15
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
14
PTO
0
R
Timeout
This bit indicates that a timeout occurred on peripheral
bus (1) when the first bus error occurred.
0: Timeout not generated
1: Timeout generated
13
PER
0
R
Illegal Address Access
This bit indicates that an illegal address access was
made on peripheral bus (1) when the first bus error
occurred.
0: Illegal address access not made
1: Illegal address access made
12 to 10
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com