H8SLASH3021 datasheet(242/712 Pages) RENESAS

242 / 712 page

8. 16-Bit Integrated Timer Unit (ITU)

Rev.2.00 Mar. 22, 2007 Page 218 of 684

REJ09B0352-0200

Bits 6 to 4—I/O Control B2 to B0 (IOB2 to IOB0): These bits select the GRB function.

Bit 6

IOB2

Bit 5

IOB1

Bit 4

IOB0

Function

No output at compare match

(Initial value)

GRB is an output

compare register

0 output at GRB compare match*

1 output at GRB compare match*

Output toggles at GRB compare match

(1 output in channel 2)*

1, *2

GRB captures rising edge of input

GRB is an input

capture register

GRB captures falling edge of input

GRB captures both edges of input

Notes: 1. After a reset, the output is 0 until the first compare match.

2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output

instead.

Bit 3—Reserved: This bit cannot be modified and is always read as 1.

Bits 2 to 0—I/O Control A2 to A0 (IOA2 to IOA0): These bits select the GRA function.

Bit 2

IOA2

Bit 1

IOA1

Bit 0

IOA0

Function

No output at compare match

(Initial value)

GRA is an outpurt

compare register

0 output at GRA compare match*

1 output at GRA compare match*

Output toggles at GRA compare match

(1 output in channel 2) *

1, *2

GRA captures rising edge of input

GRA is an input

capture register

GRA captures falling edge of input

GRA captures both edges of input

Notes: 1. After a reset, the output is 0 until the first compare match.

2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output

instead.

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