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H8/3021 Datasheet(PDF) 246 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 246 Page - Renesas Technology Corp |
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246 / 712 page ![]() 8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 222 of 684 REJ09B0352-0200 Bits 7 to 3—Reserved: These bits cannot be modified and are always read as 1. Bit 2—Overflow Interrupt Enable (OVIE): Enables or disables the interrupt requested by the overflow flag (OVF) in TSR when OVF is set to 1. Bit 2 OVIE Description 0 OVI interrupt requested by OVF is disabled (Initial value) 1 OVI interrupt requested by OVF is enabled Bit 1—Input Capture/Compare Match Interrupt Enable B (IMIEB): Enables or disables the interrupt requested by the IMFB flag in TSR when IMFB is set to 1. Bit 1 IMIEB Description 0 IMIB interrupt requested by IMFB is disabled (Initial value) 1 IMIB interrupt requested by IMFB is enabled Bit 0—Input Capture/Compare Match Interrupt Enable A (IMIEA): Enables or disables the interrupt requested by the IMFA flag in TSR when IMFA is set to 1. Bit 0 IMIEA Description 0 IMIA interrupt requested by IMFA is disabled (Initial value) 1 IMIA interrupt requested by IMFA is enabled |
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