H8SLASH3003 datasheet(534/715 Pages) RENESAS

534 / 715 page

17.4.3 Selection of Waiting Time for Exit from Software Standby Mode

Bits STS2 to STS0 in SYSCR should be set as follows.

Crystal Resonator: Set STS2 to STS0 so that the waiting time (for the clock to stabilize) is at

least 8 ms. Table 17-3 indicates the waiting times that are selected by STS2 to STS0 settings at

various system clock frequencies.

External Clock: Any value may be set in the clock-halving version. Normally the minimum value

(STS2 = STS1 = STS0 = 1) is recommended. In the 1:1 clock version, any value other than the

minimum value may be set.

Table 17-3 Clock Frequency and Waiting Time for Clock to Settle

Waiting

STS2 STS1 STS0 Time

16 MHZ 12 MHz 10 MHz 8 MHz

6 MHz

4 MHz

2 MHz

Unit

8192

0.51

0.65

0.8

1.0

1.3

2.0

4.1

states

16384

1.0

1.3

1.6

2.0

2.7

4.1

8.2

states

32768

2.0

2.7

3.3

4.1

5.5

8.2

16.4

states

65536

4.1

5.5

6.6

8.2

10.9

16.4

32.8

states

—

131072

8.2

10.9

13.1

16.4

21.8

32.8

65.5

states

—

4 states* 0.25

0.33

0.4

0.5

0.67

1.0

2.0

µs

: Recommended setting

Note: * This setting cannot be used in the 1:1 clock version.

516

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