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H8/3003 Datasheet(PDF) 679 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 679 Page - Renesas Technology Corp |
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679 / 715 page ![]() ABWCR—Bus Width Control Register H'EC Bus controller ASTCR—Access State Control Register H'ED Bus controller Bit Read/Write 7 ABW7 1 0 R/W 6 ABW6 1 0 R/W 5 ABW5 1 0 R/W 4 ABW4 1 0 R/W 3 ABW3 1 0 R/W 0 ABW0 1 0 R/W 2 ABW2 1 0 R/W 1 ABW1 1 0 R/W Initial value Mode 1, 3 Mode 2, 4 Area 7 to 0 bus width control Areas 7 to 0 are 16-bit access areas Areas 7 to 0 are 8-bit access areas Bits 7 to 0 0 1 Bus Width of Access Area AWB7 to AWB0 Bit Initial value Read/Write 7 AST7 1 R/W 6 AST6 1 R/W 5 AST5 1 R/W 4 AST4 1 R/W 3 AST3 1 R/W 0 AST0 1 R/W 2 AST2 1 R/W 1 AST1 1 R/W Area 7 to 0 access state control Areas 7 to 0 are two-state access areas Areas 7 to 0 are three-state access areas Bits 7 to 0 0 1 Number of States in Access Cycle AST7 to AST0 661 |
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