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H8/3003 Datasheet(PDF) 682 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 682 Page - Renesas Technology Corp |
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682 / 715 page  SYSCR—System Control Register H'F2 System control Bit Initial value Read/Write 7 SSBY 0 R/W 6 STS2 0 R/W 5 STS1 0 R/W 4 STS0 0 R/W 3 UE 1 R/W 0 RAME 1 R/W 2 NMIEG 0 R/W 1 — 1 — Software standby 0 SLEEP instruction causes transition to sleep mode 1 SLEEP instruction causes transition to software standby mode Standby timer select 2 to 0 STS2 0 1 Standby Timer Waiting time = 8192 states Waiting time = 16384 states Waiting time = 32768 states Waiting time = 65536 states Waiting time = 131072 states Waiting time = 4 states Bit 6 STS1 0 1 0 1 Bit 5 STS0 0 1 0 1 — Bit 4 RAM enable 0 On-chip RAM is disabled 1 On-chip RAM is enabled NMI edge select 0 An interrupt is requested at the falling edge of NMI 1 An interrupt is requested at the rising edge of NMI User bit enable 0 CCR bit 6 (UI) is used as an interrupt mask bit 1 CCR bit 6 (UI) is used as a user bit — 664 |
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