H8SLASH3003 datasheet(685/715 Pages) RENESAS

685 / 715 page

IPRA—Interrupt Priority Register A

H'F8

Interrupt controller

•

Interrupt sources controlled by each bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

IPRA7

IPRA6

IPRA5

IPRA4

IPRA3

IPRA2

IPRA1

IPRA0

Interrupt

IRQ0

IRQ1

IRQ2,

IRQ4 to

WDT,

ITU

source

IRQ3

IRQ7

Refresh

chan-

Con-

nel 0

nel 1

nel 2

troller

IPRB—Interrupt Priority Register B

H'F9

Interrupt controller

•

Interrupt sources controlled by each bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

IPRB7

IPRB6

IPRB5

IPRB4

IPRB3

IPRB2

IPRB1

—

Interrupt

ITU

DMAC

SCI

A/D

—

source

chan-

group

chan-

con-

nel 3

nel 4

nel 0

nel 1

verter

Bit

Initial value

Read/Write

IPRA7

R/W

IPRA6

R/W

IPRA5

R/W

IPRA4

R/W

IPRA3

R/W

IPRA0

R/W

IPRA2

R/W

IPRA1

R/W

Priority level A7 to A0

Priority level 0 (low priority)

Priority level 1 (high priority)

Bit

Initial value

Read/Write

IPRB7

R/W

IPRB6

R/W

IPRB5

R/W

IPRB4

R/W

IPRB3

R/W

IPRB0

R/W

IPRB2

R/W

IPRB1

R/W

Priority level B7 to B0

Priority level 0 (low priority)

Priority level 1 (high priority)

Reserved bit

667

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