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H8/3003 Datasheet(PDF) 156 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 156 Page - Renesas Technology Corp |
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156 / 715 page  7.2 Register Descriptions 7.2.1 Refresh Control Register (RFSHCR) RFSHCR is an 8-bit readable/writable register that selects the operating mode of the refresh controller. RFSHCR is initialized to H'02 by a reset and in hardware standby mode. Bit Initial value Read/Write 7 SRFMD 0 R/W 6 PSRAME 0 R/W 5 DRAME 0 R/W 4 CAS/WE 0 R/W 3 M9/M8 0 R/W 0 RCYCE 0 R/W 2 RFSHE 0 R/W 1 — 1 — Self-refresh mode Selects self-refresh mode PSRAM enable and DRAM enable These bits enable or disable connection of pseudo-static RAM and DRAM Strobe mode select Selects 2CAS or 2WE strobing of DRAM Address multiplex mode select Selects the number of column address bits Refresh pin enable Enables refresh signal output from the refresh pin Refresh cycle enable Enables or disables insertion of refresh cycles Reserved bit 138 |
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