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M38K09RFS Datasheet(PDF) 207 Page - Renesas Technology Corp |
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M38K09RFS Datasheet(HTML) 207 Page - Renesas Technology Corp |
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207 / 328 page  2.8 Watchdog timer Rev.2.00 Oct 05, 2006 page 78 of 111 38K0 Group REJ09B0337-0200 APPLICATION Fig. 2.8.3 Structure of CPU mode register b7 b6 b5 b4 b3 b2 b1 b0 R W 0 0 2 0 3 4 5 6 7 1 0 0 1 0 01 b1 b0 0 0 : Single-chip mode 0 1 : Not available 1 0 : Not available 1 1 : Not available B Name Function At reset 0 : 0 page 1 : 1 page * CPU mode register (CPUM: address 3B16) CPU mode register Processor mode bits Stack page selection bit Fix this bit to “1”. Fix this bit to “0”. 0 : Main clock f(XIN) 1 : fSYN System clock selection bit b7 b6 0 0 : φ = f(system clock)/8 (8-divide mode) 0 1 : φ = f(system clock)/4 (4-divide mode) 1 0 : φ = f(system clock)/2 (2-divide mode) 1 1 : φ = f(system clock) (Through mode) System clock division ratio selection bits *: The initial value of bit 1 depends on the CNVss level. |
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