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MC9S08DN60F1CLF Datasheet(PDF) 210 Page - Freescale Semiconductor, Inc |
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MC9S08DN60F1CLF Datasheet(HTML) 210 Page - Freescale Semiconductor, Inc |
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210 / 356 page ![]() Chapter 11 Inter-Integrated Circuit (S08IICV2) MC9S08DN60 Series Data Sheet, Rev 3 210 Freescale Semiconductor 11.7 Initialization/Application Information Figure 11-11. IIC Module Quick Start Module Initialization (Slave) 1. Write: IICC2 — to enable or disable general call — to select 10-bit or 7-bit addressing mode 2. Write: IICA — to set the slave address 3. Write: IICC1 — to enable IIC and interrupts 4. Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data 5. Initialize RAM variables used to achieve the routine shown in Figure 11-12 Module Initialization (Master) 1. Write: IICF — to set the IIC baud rate (example provided in this chapter) 2. Write: IICC1 — to enable IIC and interrupts 3. Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data 4. Initialize RAM variables used to achieve the routine shown in Figure 11-12 5. Write: IICC1 — to enable TX 6. Write: IICC1 — to enable MST (master mode) 7. Write: IICD — with the address of the target slave. (The lsb of this byte determines whether the communication is master receive or transmit.) Module Use The routine shown in Figure 11-12 can handle both master and slave IIC operations. For slave operation, an incoming IIC message that contains the proper address begins IIC communication. For master operation, communication must be initiated by writing to the IICD register. 0 IICF IICA Baud rate = BUSCLK / (2 x MULT x (SCL DIVIDER)) TX TXAK RSTA 0 0 IICC1 IICEN IICIE MST Module configuration ARBL 0 SRW IICIF RXAK IICS TCF IAAS BUSY Module status flags Register Model AD[7:1] When addressed as a slave (in slave mode), the module responds to this address MULT ICR IICD DATA Data register; Write to transmit IIC data read to read IIC data 0 AD10 AD9 AD8 IICC2 GCAEN ADEXT Address configuration 0 0 |
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