MC9S08DN60F1CLF datasheet(262/356 Pages) FREESCALE

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Chapter 15 Timer/PWM Module (S08TPMV3)

MC9S08DN60 Series Data Sheet, Rev 3

262

Freescale Semiconductor

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Edge-aligned PWM mode

The value of a 16-bit modulo register plus 1 sets the period of the PWM output signal. The channel

value register sets the duty cycle of the PWM output signal. The user may also choose the polarity

of the PWM output signal. Interrupts are available at the end of the period and at the duty-cycle

transition point. This type of PWM signal is called edge-aligned because the leading edges of all

PWM signals are aligned with the beginning of the period, which is the same for all channels within

a TPM.

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Center-aligned PWM mode

Twice the value of a 16-bit modulo register sets the period of the PWM output, and the

channel-value register sets the half-duty-cycle duration. The timer counter counts up until it

reaches the modulo value and then counts down until it reaches zero. As the count matches the

channel value register while counting down, the PWM output becomes active. When the count

matches the channel value register while counting up, the PWM output becomes inactive. This type

of PWM signal is called center-aligned because the centers of the active duty cycle periods for all

channels are aligned with a count value of zero. This type of PWM is required for types of motors

used in small appliances.

This is a high-level description only. Detailed descriptions of operating modes are in later sections.

15.1.3

Block Diagram

The TPM uses one input/output (I/O) pin per channel, TPMxCHn (timer channel n) where n is the channel

number (1-8). The TPM shares its I/O pins with general purpose I/O port pins (refer to I/O pin descriptions

in full-chip speciﬁcation for the speciﬁc chip implementation).

Figure 15-2 shows the TPM structure. The central component of the TPM is the 16-bit counter that can

operate as a free-running counter or a modulo up/down counter. The TPM counter (when operating in

normal up-counting mode) provides the timing reference for the input capture, output compare, and

edge-aligned PWM functions. The timer counter modulo registers, TPMxMODH:TPMxMODL, control

the modulo value of the counter (the values 0x0000 or 0xFFFF effectively make the counter free running).

Software can read the counter value at any time without affecting the counting sequence. Any write to

either half of the TPMxCNT counter resets the counter, regardless of the data value written.

MC9S08DN60F1CLF Datasheet(PDF) 262 Page - Freescale Semiconductor, Inc